vupdate_offset    435 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 	input->dest.vupdate_offset = pipe->pipe_dlg_param.vupdate_offset;
vupdate_offset    436 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 	input->dest.vupdate_offset = pipe->pipe_dlg_param.vupdate_offset;
vupdate_offset   1182 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 			pipe->pipe_dlg_param.vupdate_offset = v->v_update_offset_pix[input_idx];
vupdate_offset   1223 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 						hsplit_pipe->pipe_dlg_param.vupdate_offset = v->v_update_offset_pix[input_idx];
vupdate_offset   1957 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c 	int vupdate_offset,
vupdate_offset    261 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h 	int vupdate_offset,
vupdate_offset    440 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c 	int vupdate_offset,
vupdate_offset    741 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c 	int vupdate_offset,
vupdate_offset    112 drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c 	int vupdate_offset,
vupdate_offset    132 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 		+ pipe_dest->vupdate_offset) / pipe_dest->htotal) <= pipe_dest->vblank_end) {
vupdate_offset    767 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 			pipe_ctx->pipe_dlg_param.vupdate_offset,
vupdate_offset   2509 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 				pipe_ctx->pipe_dlg_param.vupdate_offset,
vupdate_offset     64 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c 		int vupdate_offset,
vupdate_offset     71 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c 	optc1->vupdate_offset = vupdate_offset;
vupdate_offset     83 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c 			VUPDATE_OFFSET, optc1->vupdate_offset,
vupdate_offset    144 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c 	int vupdate_offset,
vupdate_offset    164 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c 	optc1->vupdate_offset = vupdate_offset;
vupdate_offset    272 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c 			vupdate_offset,
vupdate_offset    518 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h 	int vupdate_offset;
vupdate_offset    563 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h 	int vupdate_offset,
vupdate_offset    583 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h 		int vupdate_offset,
vupdate_offset    183 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c 		+ pipe_dest->vupdate_offset) / pipe_dest->htotal) <= pipe_dest->vblank_end) {
vupdate_offset    573 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 			pipe_ctx->pipe_dlg_param.vupdate_offset,
vupdate_offset   1043 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 				pipe_ctx->pipe_dlg_param.vupdate_offset,
vupdate_offset   1335 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 					pipe_ctx->pipe_dlg_param.vupdate_offset,
vupdate_offset   2771 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 			dst->vupdate_offset = context->bw_ctx.dml.vba.VUpdateOffsetPix[pipe_idx_unsplit];
vupdate_offset   2786 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 						dst_j->vupdate_offset = context->bw_ctx.dml.vba.VUpdateOffsetPix[pipe_idx_unsplit];
vupdate_offset    846 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 	unsigned int vupdate_offset;
vupdate_offset   1000 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 	vupdate_offset = dst->vupdate_offset;
vupdate_offset   1027 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 				- (double) (vready_offset + vupdate_width + vupdate_offset) / htotal
vupdate_offset   1034 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 				- (double) (vready_offset + vupdate_width + vupdate_offset) / htotal
vupdate_offset    846 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 	unsigned int vupdate_offset;
vupdate_offset   1000 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 	vupdate_offset = dst->vupdate_offset;
vupdate_offset   1027 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 				- (double) (vready_offset + vupdate_width + vupdate_offset) / htotal
vupdate_offset   1034 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 				- (double) (vready_offset + vupdate_width + vupdate_offset) / htotal
vupdate_offset    893 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 	unsigned int vupdate_offset;
vupdate_offset   1040 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 	vupdate_offset = dst->vupdate_offset;
vupdate_offset   1067 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 				- (double) (vready_offset + vupdate_width + vupdate_offset) / htotal
vupdate_offset   1074 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 				- (double) (vready_offset + vupdate_width + vupdate_offset) / htotal
vupdate_offset    317 drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h 	unsigned int vupdate_offset;
vupdate_offset   1043 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 	unsigned int vupdate_offset;
vupdate_offset   1225 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 	vupdate_offset = e2e_pipe_param.pipe.dest.vupdate_offset;
vupdate_offset   1296 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 	line_setup = (double) (vupdate_offset + vupdate_width + vready_offset) / (double) htotal;
vupdate_offset   1321 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 	DTRACE("DLG: %s: vupdate_offset     = %d", __func__, vupdate_offset);
vupdate_offset    143 drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h 							int vupdate_offset,
vupdate_offset    224 drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h 			int vupdate_offset,