vtg               251 drivers/gpu/drm/sti/sti_compositor.c 		compo->vtg[STI_MIXER_MAIN] = of_vtg_find(vtg_np);
vtg               256 drivers/gpu/drm/sti/sti_compositor.c 		compo->vtg[STI_MIXER_AUX] = of_vtg_find(vtg_np);
vtg                78 drivers/gpu/drm/sti/sti_compositor.h 	struct sti_vtg *vtg[STI_MAX_MIXER];
vtg                87 drivers/gpu/drm/sti/sti_crtc.c 	sti_vtg_set_config(compo->vtg[mixer->id], &crtc->mode);
vtg               288 drivers/gpu/drm/sti/sti_crtc.c 	struct sti_vtg *vtg = compo->vtg[pipe];
vtg               292 drivers/gpu/drm/sti/sti_crtc.c 	if (sti_vtg_register_client(vtg, vtg_vblank_nb, crtc)) {
vtg               305 drivers/gpu/drm/sti/sti_crtc.c 	struct sti_vtg *vtg = compo->vtg[pipe];
vtg               309 drivers/gpu/drm/sti/sti_crtc.c 	if (sti_vtg_unregister_client(vtg, vtg_vblank_nb))
vtg               130 drivers/gpu/drm/sti/sti_gdp.c 	struct sti_vtg *vtg;
vtg               465 drivers/gpu/drm/sti/sti_gdp.c 	if (sti_vtg_unregister_client(gdp->vtg, &gdp->vtg_field_nb))
vtg               472 drivers/gpu/drm/sti/sti_gdp.c 	gdp->vtg = NULL;
vtg               735 drivers/gpu/drm/sti/sti_gdp.c 	if (!gdp->vtg) {
vtg               740 drivers/gpu/drm/sti/sti_gdp.c 		gdp->vtg = compo->vtg[mixer->id];
vtg               741 drivers/gpu/drm/sti/sti_gdp.c 		sti_vtg_register_client(gdp->vtg, &gdp->vtg_field_nb, crtc);
vtg               355 drivers/gpu/drm/sti/sti_hqvdp.c 	struct sti_vtg *vtg;
vtg               761 drivers/gpu/drm/sti/sti_hqvdp.c 	if (sti_vtg_unregister_client(hqvdp->vtg, &hqvdp->vtg_nb))
vtg              1088 drivers/gpu/drm/sti/sti_hqvdp.c 		if (sti_vtg_register_client(hqvdp->vtg,
vtg              1391 drivers/gpu/drm/sti/sti_hqvdp.c 		hqvdp->vtg = of_vtg_find(vtg_np);
vtg               154 drivers/gpu/drm/sti/sti_vtg.c static void vtg_reset(struct sti_vtg *vtg)
vtg               156 drivers/gpu/drm/sti/sti_vtg.c 	writel(1, vtg->regs + VTG_DRST_AUTOC);
vtg               238 drivers/gpu/drm/sti/sti_vtg.c static void vtg_set_mode(struct sti_vtg *vtg,
vtg               246 drivers/gpu/drm/sti/sti_vtg.c 	writel(mode->htotal, vtg->regs + VTG_CLKLN);
vtg               249 drivers/gpu/drm/sti/sti_vtg.c 	writel(mode->vtotal * 2, vtg->regs + VTG_HLFLN);
vtg               252 drivers/gpu/drm/sti/sti_vtg.c 	vtg_set_output_window(vtg->regs, mode);
vtg               269 drivers/gpu/drm/sti/sti_vtg.c 		       vtg->regs + vtg_regs_offs[i].h_hd);
vtg               271 drivers/gpu/drm/sti/sti_vtg.c 		       vtg->regs + vtg_regs_offs[i].top_v_vd);
vtg               273 drivers/gpu/drm/sti/sti_vtg.c 		       vtg->regs + vtg_regs_offs[i].bot_v_vd);
vtg               275 drivers/gpu/drm/sti/sti_vtg.c 		       vtg->regs + vtg_regs_offs[i].top_v_hd);
vtg               277 drivers/gpu/drm/sti/sti_vtg.c 		       vtg->regs + vtg_regs_offs[i].bot_v_hd);
vtg               281 drivers/gpu/drm/sti/sti_vtg.c 	writel(type, vtg->regs + VTG_MODE);
vtg               284 drivers/gpu/drm/sti/sti_vtg.c static void vtg_enable_irq(struct sti_vtg *vtg)
vtg               287 drivers/gpu/drm/sti/sti_vtg.c 	writel(0xFFFF, vtg->regs + VTG_HOST_ITS_BCLR);
vtg               288 drivers/gpu/drm/sti/sti_vtg.c 	writel(0xFFFF, vtg->regs + VTG_HOST_ITM_BCLR);
vtg               289 drivers/gpu/drm/sti/sti_vtg.c 	writel(VTG_IRQ_MASK, vtg->regs + VTG_HOST_ITM_BSET);
vtg               292 drivers/gpu/drm/sti/sti_vtg.c void sti_vtg_set_config(struct sti_vtg *vtg,
vtg               296 drivers/gpu/drm/sti/sti_vtg.c 	vtg_set_mode(vtg, VTG_MODE_MASTER, vtg->sync_params, mode);
vtg               298 drivers/gpu/drm/sti/sti_vtg.c 	vtg_reset(vtg);
vtg               300 drivers/gpu/drm/sti/sti_vtg.c 	vtg_enable_irq(vtg);
vtg               340 drivers/gpu/drm/sti/sti_vtg.c int sti_vtg_register_client(struct sti_vtg *vtg, struct notifier_block *nb,
vtg               343 drivers/gpu/drm/sti/sti_vtg.c 	vtg->crtc = crtc;
vtg               344 drivers/gpu/drm/sti/sti_vtg.c 	return raw_notifier_chain_register(&vtg->notifier_list, nb);
vtg               347 drivers/gpu/drm/sti/sti_vtg.c int sti_vtg_unregister_client(struct sti_vtg *vtg, struct notifier_block *nb)
vtg               349 drivers/gpu/drm/sti/sti_vtg.c 	return raw_notifier_chain_unregister(&vtg->notifier_list, nb);
vtg               354 drivers/gpu/drm/sti/sti_vtg.c 	struct sti_vtg *vtg = arg;
vtg               357 drivers/gpu/drm/sti/sti_vtg.c 	event = (vtg->irq_status & VTG_IRQ_TOP) ?
vtg               360 drivers/gpu/drm/sti/sti_vtg.c 	raw_notifier_call_chain(&vtg->notifier_list, event, vtg->crtc);
vtg               367 drivers/gpu/drm/sti/sti_vtg.c 	struct sti_vtg *vtg = arg;
vtg               369 drivers/gpu/drm/sti/sti_vtg.c 	vtg->irq_status = readl(vtg->regs + VTG_HOST_ITS);
vtg               371 drivers/gpu/drm/sti/sti_vtg.c 	writel(vtg->irq_status, vtg->regs + VTG_HOST_ITS_BCLR);
vtg               374 drivers/gpu/drm/sti/sti_vtg.c 	readl(vtg->regs + VTG_HOST_ITS);
vtg               382 drivers/gpu/drm/sti/sti_vtg.c 	struct sti_vtg *vtg;
vtg               386 drivers/gpu/drm/sti/sti_vtg.c 	vtg = devm_kzalloc(dev, sizeof(*vtg), GFP_KERNEL);
vtg               387 drivers/gpu/drm/sti/sti_vtg.c 	if (!vtg)
vtg               396 drivers/gpu/drm/sti/sti_vtg.c 	vtg->regs = devm_ioremap_nocache(dev, res->start, resource_size(res));
vtg               397 drivers/gpu/drm/sti/sti_vtg.c 	if (!vtg->regs) {
vtg               402 drivers/gpu/drm/sti/sti_vtg.c 	vtg->irq = platform_get_irq(pdev, 0);
vtg               403 drivers/gpu/drm/sti/sti_vtg.c 	if (vtg->irq < 0) {
vtg               405 drivers/gpu/drm/sti/sti_vtg.c 		return vtg->irq;
vtg               408 drivers/gpu/drm/sti/sti_vtg.c 	RAW_INIT_NOTIFIER_HEAD(&vtg->notifier_list);
vtg               410 drivers/gpu/drm/sti/sti_vtg.c 	ret = devm_request_threaded_irq(dev, vtg->irq, vtg_irq,
vtg               412 drivers/gpu/drm/sti/sti_vtg.c 					dev_name(dev), vtg);
vtg               418 drivers/gpu/drm/sti/sti_vtg.c 	platform_set_drvdata(pdev, vtg);
vtg                24 drivers/gpu/drm/sti/sti_vtg.h void sti_vtg_set_config(struct sti_vtg *vtg,
vtg                26 drivers/gpu/drm/sti/sti_vtg.h int sti_vtg_register_client(struct sti_vtg *vtg, struct notifier_block *nb,
vtg                28 drivers/gpu/drm/sti/sti_vtg.h int sti_vtg_unregister_client(struct sti_vtg *vtg,
vtg               445 drivers/mfd/menelaus.c 	u16 vtg;
vtg               449 drivers/mfd/menelaus.c static int menelaus_set_voltage(const struct menelaus_vtg *vtg, int mV,
vtg               457 drivers/mfd/menelaus.c 	ret = menelaus_read_reg(vtg->vtg_reg);
vtg               460 drivers/mfd/menelaus.c 	val = ret & ~(((1 << vtg->vtg_bits) - 1) << vtg->vtg_shift);
vtg               461 drivers/mfd/menelaus.c 	val |= vtg_val << vtg->vtg_shift;
vtg               465 drivers/mfd/menelaus.c 			vtg->name, mV, vtg->vtg_reg, val);
vtg               467 drivers/mfd/menelaus.c 	ret = menelaus_write_reg(vtg->vtg_reg, val);
vtg               470 drivers/mfd/menelaus.c 	ret = menelaus_write_reg(vtg->mode_reg, mode);
vtg               480 drivers/mfd/menelaus.c static int menelaus_get_vtg_value(int vtg, const struct menelaus_vtg_value *tbl,
vtg               486 drivers/mfd/menelaus.c 		if (tbl->vtg == vtg)
vtg               646 drivers/mfd/menelaus.c 	const struct menelaus_vtg *vtg;
vtg               652 drivers/mfd/menelaus.c 		vtg = &vdcdc2_vtg;
vtg               654 drivers/mfd/menelaus.c 		vtg = &vdcdc3_vtg;
vtg               657 drivers/mfd/menelaus.c 		return menelaus_set_voltage(vtg, 0, 0, 0);
vtg               663 drivers/mfd/menelaus.c 	return menelaus_set_voltage(vtg, mV, val, 0x03);