vtcr              188 arch/arm64/include/asm/kvm_arm.h #define VTCR_EL2_LVLS(vtcr)		\
vtcr              189 arch/arm64/include/asm/kvm_arm.h 	VTCR_EL2_SL0_TO_LVLS(((vtcr) & VTCR_EL2_SL0_MASK) >> VTCR_EL2_SL0_SHIFT)
vtcr              192 arch/arm64/include/asm/kvm_arm.h #define VTCR_EL2_IPA(vtcr)		(64 - ((vtcr) & VTCR_EL2_T0SZ_MASK))
vtcr               73 arch/arm64/include/asm/kvm_host.h 	u64    vtcr;
vtcr               90 arch/arm64/include/asm/kvm_hyp.h 	write_sysreg(kvm->arch.vtcr, vtcr_el2);
vtcr              135 arch/arm64/include/asm/kvm_mmu.h #define kvm_phys_shift(kvm)		VTCR_EL2_IPA(kvm->arch.vtcr)
vtcr               32 arch/arm64/include/asm/stage2_pgtable.h #define kvm_stage2_levels(kvm)		VTCR_EL2_LVLS(kvm->arch.vtcr)
vtcr              393 arch/arm64/kvm/reset.c 	u64 vtcr = VTCR_EL2_FLAGS;
vtcr              412 arch/arm64/kvm/reset.c 	vtcr |= parange << VTCR_EL2_PS_SHIFT;
vtcr              414 arch/arm64/kvm/reset.c 	vtcr |= VTCR_EL2_T0SZ(phys_shift);
vtcr              422 arch/arm64/kvm/reset.c 	vtcr |= VTCR_EL2_LVLS_TO_SL0(lvls);
vtcr              429 arch/arm64/kvm/reset.c 	vtcr |= VTCR_EL2_HA;
vtcr              432 arch/arm64/kvm/reset.c 	vtcr |= (kvm_get_vmid_bits() == 16) ?
vtcr              435 arch/arm64/kvm/reset.c 	kvm->arch.vtcr = vtcr;
vtcr              565 drivers/iommu/arm-smmu-v3.c 	u64				vtcr;
vtcr             1629 drivers/iommu/arm-smmu-v3.c 			 FIELD_PREP(STRTAB_STE_2_VTCR, s2_cfg->vtcr) |
vtcr             2198 drivers/iommu/arm-smmu-v3.c 	cfg->vtcr	= pgtbl_cfg->arm_lpae_s2_cfg.vtcr;
vtcr              515 drivers/iommu/arm-smmu.c 		cb->tcr[0] = pgtbl_cfg->arm_lpae_s2_cfg.vtcr;
vtcr              965 drivers/iommu/io-pgtable-arm.c 	cfg->arm_lpae_s2_cfg.vtcr = reg;
vtcr             1013 drivers/iommu/io-pgtable-arm.c 		cfg->arm_lpae_s2_cfg.vtcr &= 0xffffffff;
vtcr              110 include/linux/io-pgtable.h 			u64	vtcr;