vsync_clk          49 drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c 	if (IS_ERR_OR_NULL(mdp5_kms->vsync_clk)) {
vsync_clk          61 drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c 	vsync_clk_speed = clk_round_rate(mdp5_kms->vsync_clk, VSYNC_CLK_RATE);
vsync_clk          94 drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c 	ret = clk_set_rate(mdp5_kms->vsync_clk,
vsync_clk          95 drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c 		clk_round_rate(mdp5_kms->vsync_clk, VSYNC_CLK_RATE));
vsync_clk         101 drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c 	ret = clk_prepare_enable(mdp5_kms->vsync_clk);
vsync_clk         120 drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c 	clk_disable_unprepare(mdp5_kms->vsync_clk);
vsync_clk         971 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c 	ret = get_clk(pdev, &mdp5_kms->vsync_clk, "vsync", true);
vsync_clk          56 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h 	struct clk *vsync_clk;
vsync_clk          23 drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c 	struct clk *vsync_clk;
vsync_clk         142 drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c 	if (mdp5_mdss->vsync_clk)
vsync_clk         143 drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c 		clk_prepare_enable(mdp5_mdss->vsync_clk);
vsync_clk         153 drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c 	if (mdp5_mdss->vsync_clk)
vsync_clk         154 drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c 		clk_disable_unprepare(mdp5_mdss->vsync_clk);
vsync_clk         175 drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c 	mdp5_mdss->vsync_clk = msm_clk_get(pdev, "vsync");
vsync_clk         176 drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c 	if (IS_ERR(mdp5_mdss->vsync_clk))
vsync_clk         177 drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c 		mdp5_mdss->vsync_clk = NULL;