VI1_VSYNC_N 821 drivers/pinctrl/sh-pfc/pfc-r8a77470.c PINMUX_IPSR_GPSR(IP9_23_20, VI1_VSYNC_N), VI1_VSYNC_N 1125 drivers/pinctrl/sh-pfc/pfc-r8a7790.c PINMUX_IPSR_MSEL(IP6_2_0, VI1_VSYNC_N, SEL_VI1_0), VI1_VSYNC_N 1415 drivers/pinctrl/sh-pfc/pfc-r8a7791.c PINMUX_IPSR_MSEL(IP11_14_12, VI1_VSYNC_N, SEL_VI1_0), VI1_VSYNC_N 421 drivers/pinctrl/sh-pfc/pfc-r8a7792.c PINMUX_SINGLE(VI1_VSYNC_N), VI1_VSYNC_N 1434 drivers/pinctrl/sh-pfc/pfc-r8a7794.c PINMUX_IPSR_GPSR(IP13_26_24, VI1_VSYNC_N), VI1_VSYNC_N 121 drivers/pinctrl/sh-pfc/pfc-r8a77970.c #define GPSR3_3 F_(VI1_VSYNC_N, IP5_15_12) VI1_VSYNC_N 196 drivers/pinctrl/sh-pfc/pfc-r8a77970.c #define IP5_15_12 FM(VI1_VSYNC_N) FM(MSIOF1_SYNC) F_(0, 0) FM(D2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) VI1_VSYNC_N 570 drivers/pinctrl/sh-pfc/pfc-r8a77970.c PINMUX_IPSR_GPSR(IP5_15_12, VI1_VSYNC_N), VI1_VSYNC_N 135 drivers/pinctrl/sh-pfc/pfc-r8a77980.c #define GPSR3_3 F_(VI1_VSYNC_N, IP5_15_12) VI1_VSYNC_N 229 drivers/pinctrl/sh-pfc/pfc-r8a77980.c #define IP5_15_12 FM(VI1_VSYNC_N) FM(MSIOF1_SYNC) F_(0, 0) FM(D2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) VI1_VSYNC_N 647 drivers/pinctrl/sh-pfc/pfc-r8a77980.c PINMUX_IPSR_GPSR(IP5_15_12, VI1_VSYNC_N),