vready_offset 1183 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c pipe->pipe_dlg_param.vready_offset = v->v_ready_offset_pix[input_idx]; vready_offset 1224 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c hsplit_pipe->pipe_dlg_param.vready_offset = v->v_ready_offset_pix[input_idx]; vready_offset 1955 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c int vready_offset, vready_offset 259 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h int vready_offset, vready_offset 438 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c int vready_offset, vready_offset 739 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c int vready_offset, vready_offset 110 drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c int vready_offset, vready_offset 131 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c if ((pipe_dest->vstartup_start - 2*(pipe_dest->vready_offset+pipe_dest->vupdate_width vready_offset 765 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c pipe_ctx->pipe_dlg_param.vready_offset, vready_offset 2507 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c pipe_ctx->pipe_dlg_param.vready_offset, vready_offset 62 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c int vready_offset, vready_offset 69 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c optc1->vready_offset = vready_offset; vready_offset 87 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c VREADY_OFFSET, optc1->vready_offset); vready_offset 142 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c int vready_offset, vready_offset 162 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c optc1->vready_offset = vready_offset; vready_offset 270 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c vready_offset, vready_offset 520 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h int vready_offset; vready_offset 561 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h int vready_offset, vready_offset 581 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h int vready_offset, vready_offset 182 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c if ((pipe_dest->vstartup_start - (pipe_dest->vready_offset+pipe_dest->vupdate_width vready_offset 571 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c pipe_ctx->pipe_dlg_param.vready_offset, vready_offset 1041 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c pipe_ctx->pipe_dlg_param.vready_offset, vready_offset 1333 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c pipe_ctx->pipe_dlg_param.vready_offset, vready_offset 2773 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c dst->vready_offset = context->bw_ctx.dml.vba.VReadyOffsetPix[pipe_idx_unsplit]; vready_offset 2788 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c dst_j->vready_offset = context->bw_ctx.dml.vba.VReadyOffsetPix[pipe_idx_unsplit]; vready_offset 848 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c unsigned int vready_offset; vready_offset 1002 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c vready_offset = dst->vready_offset; vready_offset 1027 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal vready_offset 1034 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal vready_offset 848 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c unsigned int vready_offset; vready_offset 1002 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c vready_offset = dst->vready_offset; vready_offset 1027 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal vready_offset 1034 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal vready_offset 895 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c unsigned int vready_offset; vready_offset 1042 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c vready_offset = dst->vready_offset; vready_offset 1067 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal vready_offset 1074 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal vready_offset 319 drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h unsigned int vready_offset; vready_offset 1045 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c unsigned int vready_offset; vready_offset 1227 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c vready_offset = e2e_pipe_param.pipe.dest.vready_offset; vready_offset 1296 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c line_setup = (double) (vupdate_offset + vupdate_width + vready_offset) / (double) htotal; vready_offset 1323 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c DTRACE("DLG: %s: vready_offset = %d", __func__, vready_offset); vready_offset 141 drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h int vready_offset, vready_offset 222 drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h int vready_offset,