vrc_pciregs        15 arch/mips/pci/ops-nile4.c volatile unsigned long *const vrc_pciregs = (void *) Vrc5074_BASE;
vrc_pciregs        32 arch/mips/pci/ops-nile4.c 			vrc_pciregs[(0x200 + where) >> 2] = *val;
vrc_pciregs        34 arch/mips/pci/ops-nile4.c 			*val = vrc_pciregs[(0x200 + where) >> 2];
vrc_pciregs        40 arch/mips/pci/ops-nile4.c 	mask = vrc_pciregs[LO(NILE4_PCIINIT1)];
vrc_pciregs        41 arch/mips/pci/ops-nile4.c 	vrc_pciregs[LO(NILE4_PCIINIT1)] = 0x0000001a | (busnum ? 0x200 : 0);
vrc_pciregs        45 arch/mips/pci/ops-nile4.c 	vrc_pciregs[LO(NILE4_PCIERR)] = 0;
vrc_pciregs        46 arch/mips/pci/ops-nile4.c 	vrc_pciregs[HI(NILE4_PCIERR)] = 0;
vrc_pciregs        64 arch/mips/pci/ops-nile4.c 	err = (vrc_pciregs[HI(NILE4_PCICTRL)] >> 5) & 0x7;
vrc_pciregs        67 arch/mips/pci/ops-nile4.c 	vrc_pciregs[LO(NILE4_PCIINIT1)] = mask;