VI1_FIELD         812 drivers/pinctrl/sh-pfc/pfc-r8a77470.c 	PINMUX_IPSR_GPSR(IP9_15_12, VI1_FIELD),
VI1_FIELD        1014 drivers/pinctrl/sh-pfc/pfc-r8a7778.c 	PINMUX_IPSR_GPSR(IP7_11_9,	VI1_FIELD),
VI1_FIELD         992 drivers/pinctrl/sh-pfc/pfc-r8a7779.c 	PINMUX_IPSR_GPSR(IP5_27_24, VI1_FIELD),
VI1_FIELD        1043 drivers/pinctrl/sh-pfc/pfc-r8a7790.c 	PINMUX_IPSR_MSEL(IP4_26_24, VI1_FIELD, SEL_VI1_0),
VI1_FIELD        1423 drivers/pinctrl/sh-pfc/pfc-r8a7791.c 	PINMUX_IPSR_MSEL(IP11_18_17, VI1_FIELD, SEL_VI1_0),
VI1_FIELD         434 drivers/pinctrl/sh-pfc/pfc-r8a7792.c 	PINMUX_SINGLE(VI1_FIELD),
VI1_FIELD        1421 drivers/pinctrl/sh-pfc/pfc-r8a7794.c 	PINMUX_IPSR_GPSR(IP13_20_18, VI1_FIELD),
VI1_FIELD         108 drivers/pinctrl/sh-pfc/pfc-r8a77970.c #define GPSR3_16	F_(VI1_FIELD,		IP7_3_0)
VI1_FIELD         209 drivers/pinctrl/sh-pfc/pfc-r8a77970.c #define IP7_3_0		FM(VI1_FIELD)			FM(SDA4)		FM(IRQ5)	FM(D15)		F_(0, 0)		F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
VI1_FIELD         636 drivers/pinctrl/sh-pfc/pfc-r8a77970.c 	PINMUX_IPSR_GPSR(IP7_3_0,	VI1_FIELD),
VI1_FIELD         122 drivers/pinctrl/sh-pfc/pfc-r8a77980.c #define GPSR3_16	F_(VI1_FIELD,		IP7_3_0)
VI1_FIELD         242 drivers/pinctrl/sh-pfc/pfc-r8a77980.c #define IP7_3_0		FM(VI1_FIELD)			FM(SDA4)		F_(0, 0)		FM(D15)		FM(MMC_D7)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
VI1_FIELD         709 drivers/pinctrl/sh-pfc/pfc-r8a77980.c 	PINMUX_IPSR_GPSR(IP7_3_0,	VI1_FIELD),