vpos 83 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c int vpos, hpos; vpos 97 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c &vpos, &hpos, NULL, NULL, vpos 795 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c unsigned int pipe, unsigned int flags, int *vpos, vpos 821 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c *vpos = position & 0x1fff; vpos 840 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c *hpos = *vpos - vbl_start; vpos 857 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c if ((*vpos < vbl_start) && (*vpos >= vbl_end)) vpos 867 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c *vpos -= vbl_start; vpos 878 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c if (in_vbl && (*vpos >= vbl_start)) { vpos 885 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c *vpos = (*vpos < vtotal) ? (*vpos - vtotal) : 0; vpos 889 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c *vpos = *vpos - vbl_end; vpos 1414 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c bool in_vblank_irq, int *vpos, int *hpos, vpos 1418 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c return amdgpu_display_get_crtc_scanoutpos(dev, pipe, 0, vpos, hpos, vpos 1110 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c int vpos, hpos, stat; vpos 1138 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c &vpos, &hpos, NULL, NULL, vpos 1147 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c pipe, vpos); vpos 1153 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (vpos >= 0) vpos 595 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h unsigned int pipe, unsigned int flags, int *vpos, vpos 274 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c uint32_t vpos, hpos, v_blank_start, v_blank_end; vpos 311 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c &v_blank_end, &hpos, &vpos) || vpos 312 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c (vpos < v_blank_start)) { vpos 5685 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c int planes_count = 0, vpos, hpos; vpos 5867 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 0, &vpos, &hpos, NULL, vpos 242 drivers/gpu/drm/amd/display/dc/core/dc_stream.c unsigned int lines_to_vupdate, us_to_vupdate, vpos, nvpos; vpos 250 drivers/gpu/drm/amd/display/dc/core/dc_stream.c if (!dc_stream_get_crtc_position(dc, &stream, 1, &vpos, &nvpos)) vpos 253 drivers/gpu/drm/amd/display/dc/core/dc_stream.c if (vpos >= vupdate_line) vpos 257 drivers/gpu/drm/amd/display/dc/core/dc_stream.c lines_to_vupdate = vupdate_line - vpos; vpos 608 drivers/gpu/drm/drm_vblank.c int vpos, hpos, i; vpos 656 drivers/gpu/drm/drm_vblank.c &vpos, &hpos, vpos 688 drivers/gpu/drm/drm_vblank.c delta_ns = div_s64(1000000LL * (vpos * mode->crtc_htotal + hpos), vpos 703 drivers/gpu/drm/drm_vblank.c pipe, hpos, vpos, vpos 161 drivers/gpu/drm/gma500/psb_intel_sdvo.c struct drm_property *vpos; vpos 1780 drivers/gpu/drm/gma500/psb_intel_sdvo.c CHECK_PROPERTY(vpos, VPOS) vpos 2403 drivers/gpu/drm/gma500/psb_intel_sdvo.c ENHANCEMENT(vpos, VPOS); vpos 600 drivers/gpu/drm/gma500/psb_intel_sdvo_regs.h unsigned int vpos:1; vpos 335 drivers/gpu/drm/i2c/ch7006_mode.c int flicker, contrast, hpos, vpos; vpos 358 drivers/gpu/drm/i2c/ch7006_mode.c vpos = max(0, norm->vdisplay - round_fixed(mode->vdisplay*scale) vpos 361 drivers/gpu/drm/i2c/ch7006_mode.c setbitf(state, CH7006_POV, VPOS_8, vpos); vpos 362 drivers/gpu/drm/i2c/ch7006_mode.c setbitf(state, CH7006_VPOS, 0, vpos); vpos 364 drivers/gpu/drm/i2c/ch7006_mode.c ch7006_dbg(client, "hpos: %d, vpos: %d\n", hpos, vpos); vpos 219 drivers/gpu/drm/i915/display/dvo_ns2501.c u16 vpos; /* vertical position, 8e/8f */ vpos 246 drivers/gpu/drm/i915/display/dvo_ns2501.c .vpos = 16, vpos 266 drivers/gpu/drm/i915/display/dvo_ns2501.c .vpos = 4, vpos 285 drivers/gpu/drm/i915/display/dvo_ns2501.c .vpos = 7, vpos 631 drivers/gpu/drm/i915/display/dvo_ns2501.c ns2501_writeb(dvo, NS2501_REG8E, conf->vpos & 0xff); vpos 632 drivers/gpu/drm/i915/display/dvo_ns2501.c ns2501_writeb(dvo, NS2501_REG8F, conf->vpos >> 8); vpos 143 drivers/gpu/drm/i915/display/intel_sdvo.c struct drm_property *vpos; vpos 172 drivers/gpu/drm/i915/display/intel_sdvo.c unsigned overscan_h, overscan_v, hpos, vpos, sharpness; vpos 1388 drivers/gpu/drm/i915/display/intel_sdvo.c if (intel_sdvo_conn->vpos) vpos 1389 drivers/gpu/drm/i915/display/intel_sdvo.c UPDATE_PROPERTY(sdvo_state->tv.vpos, VPOS); vpos 2291 drivers/gpu/drm/i915/display/intel_sdvo.c else if (property == intel_sdvo_connector->vpos) vpos 2292 drivers/gpu/drm/i915/display/intel_sdvo.c *val = sdvo_state->tv.vpos; vpos 2349 drivers/gpu/drm/i915/display/intel_sdvo.c else if (property == intel_sdvo_connector->vpos) vpos 2350 drivers/gpu/drm/i915/display/intel_sdvo.c sdvo_state->tv.vpos = val; vpos 3090 drivers/gpu/drm/i915/display/intel_sdvo.c ENHANCEMENT(&sdvo_state->tv, vpos, VPOS); vpos 611 drivers/gpu/drm/i915/display/intel_sdvo_regs.h unsigned int vpos:1; vpos 946 drivers/gpu/drm/i915/i915_irq.c bool in_vblank_irq, int *vpos, int *hpos, vpos 1052 drivers/gpu/drm/i915/i915_irq.c *vpos = position; vpos 1055 drivers/gpu/drm/i915/i915_irq.c *vpos = position / htotal; vpos 1056 drivers/gpu/drm/i915/i915_irq.c *hpos = position - (*vpos * htotal); vpos 117 drivers/gpu/drm/i915/i915_irq.h bool in_vblank_irq, int *vpos, int *hpos, vpos 599 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c bool in_vblank_irq, int *vpos, int *hpos, vpos 649 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c *vpos = line; vpos 101 drivers/gpu/drm/nouveau/nouveau_display.c nouveau_display_scanoutpos_head(struct drm_crtc *crtc, int *vpos, int *hpos, vpos 130 drivers/gpu/drm/nouveau/nouveau_display.c *vpos = calc(args.scan.vblanks, args.scan.vblanke, vpos 140 drivers/gpu/drm/nouveau/nouveau_display.c bool in_vblank_irq, int *vpos, int *hpos, vpos 148 drivers/gpu/drm/nouveau/nouveau_display.c return nouveau_display_scanoutpos_head(crtc, vpos, hpos, vpos 289 drivers/gpu/drm/radeon/radeon_display.c int vpos, hpos; vpos 341 drivers/gpu/drm/radeon/radeon_display.c &vpos, &hpos, NULL, NULL, vpos 343 drivers/gpu/drm/radeon/radeon_display.c ((vpos >= 0 && hpos < 0) || (hpos >= 0 && !ASIC_IS_AVIVO(rdev)))) { vpos 419 drivers/gpu/drm/radeon/radeon_display.c int vpos, hpos; vpos 457 drivers/gpu/drm/radeon/radeon_display.c &vpos, &hpos, NULL, NULL, vpos 1813 drivers/gpu/drm/radeon/radeon_display.c unsigned int flags, int *vpos, int *hpos, vpos 1918 drivers/gpu/drm/radeon/radeon_display.c *vpos = position & 0x1fff; vpos 1937 drivers/gpu/drm/radeon/radeon_display.c *hpos = *vpos - vbl_start; vpos 1954 drivers/gpu/drm/radeon/radeon_display.c if ((*vpos < vbl_start) && (*vpos >= vbl_end)) vpos 1964 drivers/gpu/drm/radeon/radeon_display.c *vpos -= vbl_start; vpos 1975 drivers/gpu/drm/radeon/radeon_display.c if (in_vbl && (*vpos >= vbl_start)) { vpos 1977 drivers/gpu/drm/radeon/radeon_display.c *vpos = *vpos - vtotal; vpos 1981 drivers/gpu/drm/radeon/radeon_display.c *vpos = *vpos - vbl_end; vpos 138 drivers/gpu/drm/radeon/radeon_drv.c unsigned int flags, int *vpos, int *hpos, vpos 610 drivers/gpu/drm/radeon/radeon_drv.c bool in_vblank_irq, int *vpos, int *hpos, vpos 614 drivers/gpu/drm/radeon/radeon_drv.c return radeon_get_crtc_scanoutpos(dev, pipe, 0, vpos, hpos, vpos 756 drivers/gpu/drm/radeon/radeon_kms.c int vpos, hpos, stat; vpos 785 drivers/gpu/drm/radeon/radeon_kms.c &vpos, &hpos, NULL, NULL, vpos 795 drivers/gpu/drm/radeon/radeon_kms.c pipe, vpos); vpos 801 drivers/gpu/drm/radeon/radeon_kms.c if (vpos >= 0) vpos 880 drivers/gpu/drm/radeon/radeon_mode.h unsigned int flags, int *vpos, int *hpos, vpos 1765 drivers/gpu/drm/radeon/radeon_pm.c int crtc, vpos, hpos, vbl_status; vpos 1776 drivers/gpu/drm/radeon/radeon_pm.c &vpos, &hpos, NULL, NULL, vpos 672 drivers/gpu/drm/stm/ltdc.c bool in_vblank_irq, int *vpos, int *hpos, vpos 703 drivers/gpu/drm/stm/ltdc.c *vpos = line - vtotal - vactive_start; vpos 705 drivers/gpu/drm/stm/ltdc.c *vpos = line - vactive_start; vpos 707 drivers/gpu/drm/stm/ltdc.c *vpos = 0; vpos 43 drivers/gpu/drm/stm/ltdc.h bool in_vblank_irq, int *vpos, int *hpos, vpos 88 drivers/gpu/drm/vc4/vc4_crtc.c bool in_vblank_irq, int *vpos, int *hpos, vpos 119 drivers/gpu/drm/vc4/vc4_crtc.c *vpos = VC4_GET_FIELD(val, SCALER_DISPSTATX_LINE); vpos 123 drivers/gpu/drm/vc4/vc4_crtc.c *vpos /= 2; vpos 137 drivers/gpu/drm/vc4/vc4_crtc.c if (*vpos > fifo_lines) { vpos 150 drivers/gpu/drm/vc4/vc4_crtc.c *vpos -= fifo_lines + 1; vpos 176 drivers/gpu/drm/vc4/vc4_crtc.c *vpos = -vblank_lines; vpos 199 drivers/gpu/drm/vc4/vc4_crtc.c *vpos = 0; vpos 747 drivers/gpu/drm/vc4/vc4_drv.h bool in_vblank_irq, int *vpos, int *hpos, vpos 372 include/drm/drm_drv.h bool in_vblank_irq, int *vpos, int *hpos,