VI1_CLK           779 drivers/pinctrl/sh-pfc/pfc-r8a77470.c 	PINMUX_IPSR_GPSR(IP8_7_4, VI1_CLK),
VI1_CLK          1137 drivers/pinctrl/sh-pfc/pfc-r8a7778.c 	PINMUX_IPSR_GPSR(IP9_8_6,	VI1_CLK),
VI1_CLK          1704 drivers/pinctrl/sh-pfc/pfc-r8a7778.c VIN_PFC_CLK(vin1_clk,		VI1_CLK);
VI1_CLK          1283 drivers/pinctrl/sh-pfc/pfc-r8a7779.c 	PINMUX_IPSR_GPSR(IP10_25_24, VI1_CLK),
VI1_CLK          1248 drivers/pinctrl/sh-pfc/pfc-r8a7790.c 	PINMUX_IPSR_MSEL(IP8_15_14, VI1_CLK, SEL_VI1_0),
VI1_CLK          1426 drivers/pinctrl/sh-pfc/pfc-r8a7791.c 	PINMUX_IPSR_MSEL(IP11_19, VI1_CLK, SEL_VI1_0),
VI1_CLK           418 drivers/pinctrl/sh-pfc/pfc-r8a7792.c 	PINMUX_SINGLE(VI1_CLK),
VI1_CLK          1361 drivers/pinctrl/sh-pfc/pfc-r8a7794.c 	PINMUX_IPSR_GPSR(IP12_20_18, VI1_CLK),
VI1_CLK           124 drivers/pinctrl/sh-pfc/pfc-r8a77970.c #define GPSR3_0		F_(VI1_CLK,		IP5_3_0)
VI1_CLK           193 drivers/pinctrl/sh-pfc/pfc-r8a77970.c #define IP5_3_0		FM(VI1_CLK)			FM(MSIOF1_RXD)		F_(0, 0)	FM(CS0_N)	F_(0, 0)		F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
VI1_CLK           558 drivers/pinctrl/sh-pfc/pfc-r8a77970.c 	PINMUX_IPSR_GPSR(IP5_3_0,	VI1_CLK),
VI1_CLK           138 drivers/pinctrl/sh-pfc/pfc-r8a77980.c #define GPSR3_0		F_(VI1_CLK,		IP5_3_0)
VI1_CLK           226 drivers/pinctrl/sh-pfc/pfc-r8a77980.c #define IP5_3_0		FM(VI1_CLK)			FM(MSIOF1_RXD)		F_(0, 0)		FM(CS0_N)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
VI1_CLK           635 drivers/pinctrl/sh-pfc/pfc-r8a77980.c 	PINMUX_IPSR_GPSR(IP5_3_0,	VI1_CLK),