voltage_level 1000 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->voltage_level = v->voltage_level_without_immediate_flip; voltage_level 1004 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->voltage_level = v->voltage_level_with_immediate_flip; voltage_level 1006 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dcfclk = v->dcfclk_per_state[v->voltage_level]; voltage_level 1007 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->fabric_and_dram_bandwidth = v->fabric_and_dram_bandwidth_per_state[v->voltage_level]; voltage_level 1009 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->required_dispclk_per_ratio[j] = v->required_dispclk[v->voltage_level][j]; voltage_level 1011 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dpp_per_plane_per_ratio[j][k] = v->no_of_dpp[v->voltage_level][j][k]; voltage_level 1013 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dispclk_dppclk_support_per_ratio[j] = v->dispclk_dppclk_support[v->voltage_level][j]; voltage_level 1015 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->max_phyclk = v->phyclk_per_state[v->voltage_level]; voltage_level 485 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c input.clks_cfg.voltage = v->voltage_level; voltage_level 547 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c if (v->voltage_level < 2) { voltage_level 577 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c if (v->voltage_level < 3) { voltage_level 601 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->fabric_and_dram_bandwidth = v->fabric_and_dram_bandwidth_per_state[v->voltage_level]; voltage_level 605 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dcfclk = v->dcfclk_per_state[v->voltage_level]; voltage_level 616 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c if (v->voltage_level >= 2) { voltage_level 620 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c if (v->voltage_level >= 3) voltage_level 1034 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c if (v->voltage_level != 0 voltage_level 1041 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c if (v->voltage_level == 0 && voltage_level 1094 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c if (v->voltage_level != number_of_states_plus_one && !fast_validate) { voltage_level 1149 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c context->bw_ctx.bw.dcn.clk.phyclk_khz = v->phyclk_per_state[v->voltage_level]; voltage_level 1150 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c switch (v->voltage_level) { voltage_level 1259 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c } else if (v->voltage_level == number_of_states_plus_one) { voltage_level 1265 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c if (v->voltage_level == 0) { voltage_level 1283 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c if (bw_limit_pass && v->voltage_level <= get_highest_allowed_voltage_level(dc->ctx->asic_id.hw_internal_rev)) voltage_level 211 drivers/gpu/drm/amd/display/dc/inc/dcn_calcs.h int voltage_level; voltage_level 1382 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c SMU7_Discrete_VoltageLevel voltage_level; voltage_level 1456 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c if (0 == ci_populate_mvdd_value(hwmgr, 0, &voltage_level)) voltage_level 1458 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c PP_HOST_TO_SMC_UL(voltage_level.Voltage * VOLTAGE_SCALE); voltage_level 1430 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c SMU71_Discrete_VoltageLevel voltage_level; voltage_level 1504 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c if (0 == iceland_populate_mvdd_value(hwmgr, 0, &voltage_level)) voltage_level 1506 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c PP_HOST_TO_SMC_UL(voltage_level.Voltage * VOLTAGE_SCALE); voltage_level 1182 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c SMIO_Pattern voltage_level; voltage_level 1246 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c if (0 == tonga_populate_mvdd_value(hwmgr, 0, &voltage_level)) voltage_level 1248 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c PP_HOST_TO_SMC_UL(voltage_level.Voltage * VOLTAGE_SCALE); voltage_level 482 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->voltage_level = (val & DSPFREQGUAR_MASK) >> voltage_level 485 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->voltage_level = (val & DSPFREQGUAR_MASK_CHV) >> voltage_level 530 drivers/gpu/drm/i915/display/intel_cdclk.c u32 val, cmd = cdclk_state->voltage_level; voltage_level 617 drivers/gpu/drm/i915/display/intel_cdclk.c u32 val, cmd = cdclk_state->voltage_level; voltage_level 709 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->voltage_level = voltage_level 780 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->voltage_level); voltage_level 919 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->voltage_level = voltage_level 1077 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->voltage_level); voltage_level 1148 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state.voltage_level = skl_calc_voltage_level(cdclk_state.cdclk); voltage_level 1159 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state.voltage_level = skl_calc_voltage_level(cdclk_state.cdclk); voltage_level 1299 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->voltage_level = voltage_level 1410 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->voltage_level, 150, 2); voltage_level 1492 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state.voltage_level = bxt_calc_voltage_level(cdclk_state.cdclk); voltage_level 1503 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state.voltage_level = bxt_calc_voltage_level(cdclk_state.cdclk); voltage_level 1584 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->voltage_level = voltage_level 1673 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->voltage_level); voltage_level 1681 drivers/gpu/drm/i915/display/intel_cdclk.c dev_priv->cdclk.hw.voltage_level = cdclk_state->voltage_level; voltage_level 1850 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->voltage_level); voltage_level 1858 drivers/gpu/drm/i915/display/intel_cdclk.c dev_priv->cdclk.hw.voltage_level = cdclk_state->voltage_level; voltage_level 1927 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->voltage_level = voltage_level 1962 drivers/gpu/drm/i915/display/intel_cdclk.c sanitized_state.voltage_level = voltage_level 1975 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state.voltage_level = icl_calc_voltage_level(dev_priv, voltage_level 1995 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state.voltage_level = cnl_calc_voltage_level(cdclk_state.cdclk); voltage_level 2006 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state.voltage_level = cnl_calc_voltage_level(cdclk_state.cdclk); voltage_level 2101 drivers/gpu/drm/i915/display/intel_cdclk.c a->voltage_level != b->voltage_level; voltage_level 2130 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->voltage_level); voltage_level 2369 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.logical.voltage_level = voltage_level 2376 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.actual.voltage_level = voltage_level 2400 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.logical.voltage_level = voltage_level 2407 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.actual.voltage_level = voltage_level 2470 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.logical.voltage_level = voltage_level 2478 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.actual.voltage_level = voltage_level 2506 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.logical.voltage_level = voltage_level 2520 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.actual.voltage_level = voltage_level 2543 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.logical.voltage_level = voltage_level 2553 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.actual.voltage_level = voltage_level 2577 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.logical.voltage_level = voltage_level 2587 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.actual.voltage_level = voltage_level 13554 drivers/gpu/drm/i915/display/intel_display.c state->cdclk.logical.voltage_level, voltage_level 13555 drivers/gpu/drm/i915/display/intel_display.c state->cdclk.actual.voltage_level); voltage_level 1279 drivers/gpu/drm/i915/i915_drv.h u8 voltage_level; voltage_level 468 drivers/gpu/drm/msm/edp/edp_ctrl.c u8 voltage_level, u8 pre_emphasis_level) voltage_level 473 drivers/gpu/drm/msm/edp/edp_ctrl.c if (voltage_level >= DPCD_LINK_VOLTAGE_MAX) voltage_level 474 drivers/gpu/drm/msm/edp/edp_ctrl.c voltage_level |= 0x04; voltage_level 482 drivers/gpu/drm/msm/edp/edp_ctrl.c buf[i] = voltage_level | pre_emphasis_level; voltage_level 484 drivers/gpu/drm/msm/edp/edp_ctrl.c DBG("%s: p|v=0x%x", __func__, voltage_level | pre_emphasis_level); voltage_level 2994 drivers/gpu/drm/radeon/ci_dpm.c SMU7_Discrete_VoltageLevel voltage_level; voltage_level 3061 drivers/gpu/drm/radeon/ci_dpm.c if (ci_populate_mvdd_value(rdev, 0, &voltage_level)) voltage_level 3065 drivers/gpu/drm/radeon/ci_dpm.c cpu_to_be32(voltage_level.Voltage * VOLTAGE_SCALE); voltage_level 299 drivers/gpu/drm/radeon/radeon.h void radeon_atom_set_voltage(struct radeon_device *rdev, u16 voltage_level, u8 voltage_type); voltage_level 301 drivers/gpu/drm/radeon/radeon.h u16 voltage_level, u8 voltage_type, voltage_level 3107 drivers/gpu/drm/radeon/radeon_atombios.c void radeon_atom_set_voltage(struct radeon_device *rdev, u16 voltage_level, u8 voltage_type) voltage_level 3111 drivers/gpu/drm/radeon/radeon_atombios.c u8 frev, crev, volt_index = voltage_level; voltage_level 3117 drivers/gpu/drm/radeon/radeon_atombios.c if (voltage_level == 0xff01) voltage_level 3129 drivers/gpu/drm/radeon/radeon_atombios.c args.v2.usVoltageLevel = cpu_to_le16(voltage_level); voltage_level 3134 drivers/gpu/drm/radeon/radeon_atombios.c args.v3.usVoltageLevel = cpu_to_le16(voltage_level); voltage_level 3342 drivers/gpu/drm/radeon/radeon_atombios.c u16 voltage_level, u8 voltage_type, voltage_level 3358 drivers/gpu/drm/radeon/radeon_atombios.c args.v2.usVoltageLevel = cpu_to_le16(voltage_level); voltage_level 3366 drivers/gpu/drm/radeon/radeon_atombios.c args.v2.usVoltageLevel = cpu_to_le16(voltage_level);