vmx_msr           222 arch/x86/kvm/vmx/capabilities.h 	u64 vmx_msr;
vmx_msr           225 arch/x86/kvm/vmx/capabilities.h 	rdmsrl(MSR_IA32_VMX_MISC, vmx_msr);
vmx_msr           226 arch/x86/kvm/vmx/capabilities.h 	if (!(vmx_msr & MSR_IA32_VMX_MISC_VMWRITE_SHADOW_RO_FIELDS))
vmx_msr           348 arch/x86/kvm/vmx/capabilities.h 	u64 vmx_msr;
vmx_msr           350 arch/x86/kvm/vmx/capabilities.h 	rdmsrl(MSR_IA32_VMX_MISC, vmx_msr);
vmx_msr           351 arch/x86/kvm/vmx/capabilities.h 	return (vmx_msr & MSR_IA32_VMX_MISC_INTEL_PT) &&
vmx_msr          7728 arch/x86/kvm/vmx/vmx.c 		u64 vmx_msr;
vmx_msr          7730 arch/x86/kvm/vmx/vmx.c 		rdmsrl(MSR_IA32_VMX_MISC, vmx_msr);
vmx_msr          7732 arch/x86/kvm/vmx/vmx.c 			vmx_msr & VMX_MISC_PREEMPTION_TIMER_RATE_MASK;