vmcr 72 arch/arm/include/asm/kvm_asm.h extern void __vgic_v3_write_vmcr(u32 vmcr); vmcr 73 arch/arm64/include/asm/kvm_asm.h extern void __vgic_v3_write_vmcr(u32 vmcr); vmcr 18 arch/arm64/kvm/vgic-sys-reg-v3.c struct vgic_vmcr vmcr; vmcr 21 arch/arm64/kvm/vgic-sys-reg-v3.c vgic_get_vmcr(vcpu, &vmcr); vmcr 60 arch/arm64/kvm/vgic-sys-reg-v3.c vmcr.cbpr = (val & ICC_CTLR_EL1_CBPR_MASK) >> ICC_CTLR_EL1_CBPR_SHIFT; vmcr 61 arch/arm64/kvm/vgic-sys-reg-v3.c vmcr.eoim = (val & ICC_CTLR_EL1_EOImode_MASK) >> ICC_CTLR_EL1_EOImode_SHIFT; vmcr 62 arch/arm64/kvm/vgic-sys-reg-v3.c vgic_set_vmcr(vcpu, &vmcr); vmcr 78 arch/arm64/kvm/vgic-sys-reg-v3.c val |= (vmcr.cbpr << ICC_CTLR_EL1_CBPR_SHIFT) & ICC_CTLR_EL1_CBPR_MASK; vmcr 79 arch/arm64/kvm/vgic-sys-reg-v3.c val |= (vmcr.eoim << ICC_CTLR_EL1_EOImode_SHIFT) & ICC_CTLR_EL1_EOImode_MASK; vmcr 90 arch/arm64/kvm/vgic-sys-reg-v3.c struct vgic_vmcr vmcr; vmcr 92 arch/arm64/kvm/vgic-sys-reg-v3.c vgic_get_vmcr(vcpu, &vmcr); vmcr 94 arch/arm64/kvm/vgic-sys-reg-v3.c vmcr.pmr = (p->regval & ICC_PMR_EL1_MASK) >> ICC_PMR_EL1_SHIFT; vmcr 95 arch/arm64/kvm/vgic-sys-reg-v3.c vgic_set_vmcr(vcpu, &vmcr); vmcr 97 arch/arm64/kvm/vgic-sys-reg-v3.c p->regval = (vmcr.pmr << ICC_PMR_EL1_SHIFT) & ICC_PMR_EL1_MASK; vmcr 106 arch/arm64/kvm/vgic-sys-reg-v3.c struct vgic_vmcr vmcr; vmcr 108 arch/arm64/kvm/vgic-sys-reg-v3.c vgic_get_vmcr(vcpu, &vmcr); vmcr 110 arch/arm64/kvm/vgic-sys-reg-v3.c vmcr.bpr = (p->regval & ICC_BPR0_EL1_MASK) >> vmcr 112 arch/arm64/kvm/vgic-sys-reg-v3.c vgic_set_vmcr(vcpu, &vmcr); vmcr 114 arch/arm64/kvm/vgic-sys-reg-v3.c p->regval = (vmcr.bpr << ICC_BPR0_EL1_SHIFT) & vmcr 124 arch/arm64/kvm/vgic-sys-reg-v3.c struct vgic_vmcr vmcr; vmcr 129 arch/arm64/kvm/vgic-sys-reg-v3.c vgic_get_vmcr(vcpu, &vmcr); vmcr 130 arch/arm64/kvm/vgic-sys-reg-v3.c if (!vmcr.cbpr) { vmcr 132 arch/arm64/kvm/vgic-sys-reg-v3.c vmcr.abpr = (p->regval & ICC_BPR1_EL1_MASK) >> vmcr 134 arch/arm64/kvm/vgic-sys-reg-v3.c vgic_set_vmcr(vcpu, &vmcr); vmcr 136 arch/arm64/kvm/vgic-sys-reg-v3.c p->regval = (vmcr.abpr << ICC_BPR1_EL1_SHIFT) & vmcr 141 arch/arm64/kvm/vgic-sys-reg-v3.c p->regval = min((vmcr.bpr + 1), 7U); vmcr 150 arch/arm64/kvm/vgic-sys-reg-v3.c struct vgic_vmcr vmcr; vmcr 152 arch/arm64/kvm/vgic-sys-reg-v3.c vgic_get_vmcr(vcpu, &vmcr); vmcr 154 arch/arm64/kvm/vgic-sys-reg-v3.c vmcr.grpen0 = (p->regval & ICC_IGRPEN0_EL1_MASK) >> vmcr 156 arch/arm64/kvm/vgic-sys-reg-v3.c vgic_set_vmcr(vcpu, &vmcr); vmcr 158 arch/arm64/kvm/vgic-sys-reg-v3.c p->regval = (vmcr.grpen0 << ICC_IGRPEN0_EL1_SHIFT) & vmcr 168 arch/arm64/kvm/vgic-sys-reg-v3.c struct vgic_vmcr vmcr; vmcr 170 arch/arm64/kvm/vgic-sys-reg-v3.c vgic_get_vmcr(vcpu, &vmcr); vmcr 172 arch/arm64/kvm/vgic-sys-reg-v3.c vmcr.grpen1 = (p->regval & ICC_IGRPEN1_EL1_MASK) >> vmcr 174 arch/arm64/kvm/vgic-sys-reg-v3.c vgic_set_vmcr(vcpu, &vmcr); vmcr 176 arch/arm64/kvm/vgic-sys-reg-v3.c p->regval = (vmcr.grpen1 << ICC_IGRPEN1_EL1_SHIFT) & vmcr 131 drivers/video/fbdev/cg14.c u32 vmcr; /* VBC Master Control */ vmcr 429 virt/kvm/arm/hyp/vgic-v3-sr.c void __hyp_text __vgic_v3_write_vmcr(u32 vmcr) vmcr 431 virt/kvm/arm/hyp/vgic-v3-sr.c write_gicreg(vmcr, ICH_VMCR_EL2); vmcr 453 virt/kvm/arm/hyp/vgic-v3-sr.c u32 vmcr, vmcr 469 virt/kvm/arm/hyp/vgic-v3-sr.c if (!(val & ICH_LR_GROUP) && !(vmcr & ICH_VMCR_ENG0_MASK)) vmcr 473 virt/kvm/arm/hyp/vgic-v3-sr.c if ((val & ICH_LR_GROUP) && !(vmcr & ICH_VMCR_ENG1_MASK)) vmcr 544 virt/kvm/arm/hyp/vgic-v3-sr.c static unsigned int __hyp_text __vgic_v3_get_bpr0(u32 vmcr) vmcr 546 virt/kvm/arm/hyp/vgic-v3-sr.c return (vmcr & ICH_VMCR_BPR0_MASK) >> ICH_VMCR_BPR0_SHIFT; vmcr 549 virt/kvm/arm/hyp/vgic-v3-sr.c static unsigned int __hyp_text __vgic_v3_get_bpr1(u32 vmcr) vmcr 553 virt/kvm/arm/hyp/vgic-v3-sr.c if (vmcr & ICH_VMCR_CBPR_MASK) { vmcr 554 virt/kvm/arm/hyp/vgic-v3-sr.c bpr = __vgic_v3_get_bpr0(vmcr); vmcr 558 virt/kvm/arm/hyp/vgic-v3-sr.c bpr = (vmcr & ICH_VMCR_BPR1_MASK) >> ICH_VMCR_BPR1_SHIFT; vmcr 568 virt/kvm/arm/hyp/vgic-v3-sr.c static u8 __hyp_text __vgic_v3_pri_to_pre(u8 pri, u32 vmcr, int grp) vmcr 573 virt/kvm/arm/hyp/vgic-v3-sr.c bpr = __vgic_v3_get_bpr0(vmcr) + 1; vmcr 575 virt/kvm/arm/hyp/vgic-v3-sr.c bpr = __vgic_v3_get_bpr1(vmcr); vmcr 586 virt/kvm/arm/hyp/vgic-v3-sr.c static void __hyp_text __vgic_v3_set_active_priority(u8 pri, u32 vmcr, int grp) vmcr 592 virt/kvm/arm/hyp/vgic-v3-sr.c pre = __vgic_v3_pri_to_pre(pri, vmcr, grp); vmcr 643 virt/kvm/arm/hyp/vgic-v3-sr.c static void __hyp_text __vgic_v3_read_iar(struct kvm_vcpu *vcpu, u32 vmcr, int rt) vmcr 651 virt/kvm/arm/hyp/vgic-v3-sr.c lr = __vgic_v3_highest_priority_lr(vcpu, vmcr, &lr_val); vmcr 658 virt/kvm/arm/hyp/vgic-v3-sr.c pmr = (vmcr & ICH_VMCR_PMR_MASK) >> ICH_VMCR_PMR_SHIFT; vmcr 663 virt/kvm/arm/hyp/vgic-v3-sr.c if (__vgic_v3_get_highest_active_priority() <= __vgic_v3_pri_to_pre(lr_prio, vmcr, grp)) vmcr 671 virt/kvm/arm/hyp/vgic-v3-sr.c __vgic_v3_set_active_priority(lr_prio, vmcr, grp); vmcr 702 virt/kvm/arm/hyp/vgic-v3-sr.c u32 vmcr, int rt) vmcr 709 virt/kvm/arm/hyp/vgic-v3-sr.c if (!(vmcr & ICH_VMCR_EOIM_MASK)) vmcr 725 virt/kvm/arm/hyp/vgic-v3-sr.c static void __hyp_text __vgic_v3_write_eoir(struct kvm_vcpu *vcpu, u32 vmcr, int rt) vmcr 742 virt/kvm/arm/hyp/vgic-v3-sr.c if (vmcr & ICH_VMCR_EOIM_MASK) vmcr 755 virt/kvm/arm/hyp/vgic-v3-sr.c __vgic_v3_pri_to_pre(lr_prio, vmcr, grp) != act_prio) vmcr 762 virt/kvm/arm/hyp/vgic-v3-sr.c static void __hyp_text __vgic_v3_read_igrpen0(struct kvm_vcpu *vcpu, u32 vmcr, int rt) vmcr 764 virt/kvm/arm/hyp/vgic-v3-sr.c vcpu_set_reg(vcpu, rt, !!(vmcr & ICH_VMCR_ENG0_MASK)); vmcr 767 virt/kvm/arm/hyp/vgic-v3-sr.c static void __hyp_text __vgic_v3_read_igrpen1(struct kvm_vcpu *vcpu, u32 vmcr, int rt) vmcr 769 virt/kvm/arm/hyp/vgic-v3-sr.c vcpu_set_reg(vcpu, rt, !!(vmcr & ICH_VMCR_ENG1_MASK)); vmcr 772 virt/kvm/arm/hyp/vgic-v3-sr.c static void __hyp_text __vgic_v3_write_igrpen0(struct kvm_vcpu *vcpu, u32 vmcr, int rt) vmcr 777 virt/kvm/arm/hyp/vgic-v3-sr.c vmcr |= ICH_VMCR_ENG0_MASK; vmcr 779 virt/kvm/arm/hyp/vgic-v3-sr.c vmcr &= ~ICH_VMCR_ENG0_MASK; vmcr 781 virt/kvm/arm/hyp/vgic-v3-sr.c __vgic_v3_write_vmcr(vmcr); vmcr 784 virt/kvm/arm/hyp/vgic-v3-sr.c static void __hyp_text __vgic_v3_write_igrpen1(struct kvm_vcpu *vcpu, u32 vmcr, int rt) vmcr 789 virt/kvm/arm/hyp/vgic-v3-sr.c vmcr |= ICH_VMCR_ENG1_MASK; vmcr 791 virt/kvm/arm/hyp/vgic-v3-sr.c vmcr &= ~ICH_VMCR_ENG1_MASK; vmcr 793 virt/kvm/arm/hyp/vgic-v3-sr.c __vgic_v3_write_vmcr(vmcr); vmcr 796 virt/kvm/arm/hyp/vgic-v3-sr.c static void __hyp_text __vgic_v3_read_bpr0(struct kvm_vcpu *vcpu, u32 vmcr, int rt) vmcr 798 virt/kvm/arm/hyp/vgic-v3-sr.c vcpu_set_reg(vcpu, rt, __vgic_v3_get_bpr0(vmcr)); vmcr 801 virt/kvm/arm/hyp/vgic-v3-sr.c static void __hyp_text __vgic_v3_read_bpr1(struct kvm_vcpu *vcpu, u32 vmcr, int rt) vmcr 803 virt/kvm/arm/hyp/vgic-v3-sr.c vcpu_set_reg(vcpu, rt, __vgic_v3_get_bpr1(vmcr)); vmcr 806 virt/kvm/arm/hyp/vgic-v3-sr.c static void __hyp_text __vgic_v3_write_bpr0(struct kvm_vcpu *vcpu, u32 vmcr, int rt) vmcr 817 virt/kvm/arm/hyp/vgic-v3-sr.c vmcr &= ~ICH_VMCR_BPR0_MASK; vmcr 818 virt/kvm/arm/hyp/vgic-v3-sr.c vmcr |= val; vmcr 820 virt/kvm/arm/hyp/vgic-v3-sr.c __vgic_v3_write_vmcr(vmcr); vmcr 823 virt/kvm/arm/hyp/vgic-v3-sr.c static void __hyp_text __vgic_v3_write_bpr1(struct kvm_vcpu *vcpu, u32 vmcr, int rt) vmcr 828 virt/kvm/arm/hyp/vgic-v3-sr.c if (vmcr & ICH_VMCR_CBPR_MASK) vmcr 837 virt/kvm/arm/hyp/vgic-v3-sr.c vmcr &= ~ICH_VMCR_BPR1_MASK; vmcr 838 virt/kvm/arm/hyp/vgic-v3-sr.c vmcr |= val; vmcr 840 virt/kvm/arm/hyp/vgic-v3-sr.c __vgic_v3_write_vmcr(vmcr); vmcr 866 virt/kvm/arm/hyp/vgic-v3-sr.c u32 vmcr, int rt) vmcr 872 virt/kvm/arm/hyp/vgic-v3-sr.c u32 vmcr, int rt) vmcr 878 virt/kvm/arm/hyp/vgic-v3-sr.c u32 vmcr, int rt) vmcr 884 virt/kvm/arm/hyp/vgic-v3-sr.c u32 vmcr, int rt) vmcr 890 virt/kvm/arm/hyp/vgic-v3-sr.c u32 vmcr, int rt) vmcr 896 virt/kvm/arm/hyp/vgic-v3-sr.c u32 vmcr, int rt) vmcr 902 virt/kvm/arm/hyp/vgic-v3-sr.c u32 vmcr, int rt) vmcr 908 virt/kvm/arm/hyp/vgic-v3-sr.c u32 vmcr, int rt) vmcr 914 virt/kvm/arm/hyp/vgic-v3-sr.c u32 vmcr, int rt) vmcr 921 virt/kvm/arm/hyp/vgic-v3-sr.c lr = __vgic_v3_highest_priority_lr(vcpu, vmcr, &lr_val); vmcr 934 virt/kvm/arm/hyp/vgic-v3-sr.c u32 vmcr, int rt) vmcr 936 virt/kvm/arm/hyp/vgic-v3-sr.c vmcr &= ICH_VMCR_PMR_MASK; vmcr 937 virt/kvm/arm/hyp/vgic-v3-sr.c vmcr >>= ICH_VMCR_PMR_SHIFT; vmcr 938 virt/kvm/arm/hyp/vgic-v3-sr.c vcpu_set_reg(vcpu, rt, vmcr); vmcr 942 virt/kvm/arm/hyp/vgic-v3-sr.c u32 vmcr, int rt) vmcr 948 virt/kvm/arm/hyp/vgic-v3-sr.c vmcr &= ~ICH_VMCR_PMR_MASK; vmcr 949 virt/kvm/arm/hyp/vgic-v3-sr.c vmcr |= val; vmcr 951 virt/kvm/arm/hyp/vgic-v3-sr.c write_gicreg(vmcr, ICH_VMCR_EL2); vmcr 955 virt/kvm/arm/hyp/vgic-v3-sr.c u32 vmcr, int rt) vmcr 962 virt/kvm/arm/hyp/vgic-v3-sr.c u32 vmcr, int rt) vmcr 976 virt/kvm/arm/hyp/vgic-v3-sr.c val |= ((vmcr & ICH_VMCR_EOIM_MASK) >> ICH_VMCR_EOIM_SHIFT) << ICC_CTLR_EL1_EOImode_SHIFT; vmcr 978 virt/kvm/arm/hyp/vgic-v3-sr.c val |= (vmcr & ICH_VMCR_CBPR_MASK) >> ICH_VMCR_CBPR_SHIFT; vmcr 984 virt/kvm/arm/hyp/vgic-v3-sr.c u32 vmcr, int rt) vmcr 989 virt/kvm/arm/hyp/vgic-v3-sr.c vmcr |= ICH_VMCR_CBPR_MASK; vmcr 991 virt/kvm/arm/hyp/vgic-v3-sr.c vmcr &= ~ICH_VMCR_CBPR_MASK; vmcr 994 virt/kvm/arm/hyp/vgic-v3-sr.c vmcr |= ICH_VMCR_EOIM_MASK; vmcr 996 virt/kvm/arm/hyp/vgic-v3-sr.c vmcr &= ~ICH_VMCR_EOIM_MASK; vmcr 998 virt/kvm/arm/hyp/vgic-v3-sr.c write_gicreg(vmcr, ICH_VMCR_EL2); vmcr 1005 virt/kvm/arm/hyp/vgic-v3-sr.c u32 vmcr; vmcr 1121 virt/kvm/arm/hyp/vgic-v3-sr.c vmcr = __vgic_v3_read_vmcr(); vmcr 1123 virt/kvm/arm/hyp/vgic-v3-sr.c fn(vcpu, vmcr, rt); vmcr 267 virt/kvm/arm/vgic/vgic-mmio-v2.c struct vgic_vmcr vmcr; vmcr 270 virt/kvm/arm/vgic/vgic-mmio-v2.c vgic_get_vmcr(vcpu, &vmcr); vmcr 274 virt/kvm/arm/vgic/vgic-mmio-v2.c val = vmcr.grpen0 << GIC_CPU_CTRL_EnableGrp0_SHIFT; vmcr 275 virt/kvm/arm/vgic/vgic-mmio-v2.c val |= vmcr.grpen1 << GIC_CPU_CTRL_EnableGrp1_SHIFT; vmcr 276 virt/kvm/arm/vgic/vgic-mmio-v2.c val |= vmcr.ackctl << GIC_CPU_CTRL_AckCtl_SHIFT; vmcr 277 virt/kvm/arm/vgic/vgic-mmio-v2.c val |= vmcr.fiqen << GIC_CPU_CTRL_FIQEn_SHIFT; vmcr 278 virt/kvm/arm/vgic/vgic-mmio-v2.c val |= vmcr.cbpr << GIC_CPU_CTRL_CBPR_SHIFT; vmcr 279 virt/kvm/arm/vgic/vgic-mmio-v2.c val |= vmcr.eoim << GIC_CPU_CTRL_EOImodeNS_SHIFT; vmcr 290 virt/kvm/arm/vgic/vgic-mmio-v2.c val = (vmcr.pmr & GICV_PMR_PRIORITY_MASK) >> vmcr 294 virt/kvm/arm/vgic/vgic-mmio-v2.c val = vmcr.bpr; vmcr 297 virt/kvm/arm/vgic/vgic-mmio-v2.c val = vmcr.abpr; vmcr 315 virt/kvm/arm/vgic/vgic-mmio-v2.c struct vgic_vmcr vmcr; vmcr 317 virt/kvm/arm/vgic/vgic-mmio-v2.c vgic_get_vmcr(vcpu, &vmcr); vmcr 321 virt/kvm/arm/vgic/vgic-mmio-v2.c vmcr.grpen0 = !!(val & GIC_CPU_CTRL_EnableGrp0); vmcr 322 virt/kvm/arm/vgic/vgic-mmio-v2.c vmcr.grpen1 = !!(val & GIC_CPU_CTRL_EnableGrp1); vmcr 323 virt/kvm/arm/vgic/vgic-mmio-v2.c vmcr.ackctl = !!(val & GIC_CPU_CTRL_AckCtl); vmcr 324 virt/kvm/arm/vgic/vgic-mmio-v2.c vmcr.fiqen = !!(val & GIC_CPU_CTRL_FIQEn); vmcr 325 virt/kvm/arm/vgic/vgic-mmio-v2.c vmcr.cbpr = !!(val & GIC_CPU_CTRL_CBPR); vmcr 326 virt/kvm/arm/vgic/vgic-mmio-v2.c vmcr.eoim = !!(val & GIC_CPU_CTRL_EOImodeNS); vmcr 337 virt/kvm/arm/vgic/vgic-mmio-v2.c vmcr.pmr = (val << GICV_PMR_PRIORITY_SHIFT) & vmcr 341 virt/kvm/arm/vgic/vgic-mmio-v2.c vmcr.bpr = val; vmcr 344 virt/kvm/arm/vgic/vgic-mmio-v2.c vmcr.abpr = val; vmcr 348 virt/kvm/arm/vgic/vgic-mmio-v2.c vgic_set_vmcr(vcpu, &vmcr); vmcr 680 virt/kvm/arm/vgic/vgic-mmio.c void vgic_set_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr) vmcr 683 virt/kvm/arm/vgic/vgic-mmio.c vgic_v2_set_vmcr(vcpu, vmcr); vmcr 685 virt/kvm/arm/vgic/vgic-mmio.c vgic_v3_set_vmcr(vcpu, vmcr); vmcr 688 virt/kvm/arm/vgic/vgic-mmio.c void vgic_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr) vmcr 691 virt/kvm/arm/vgic/vgic-mmio.c vgic_v2_get_vmcr(vcpu, vmcr); vmcr 693 virt/kvm/arm/vgic/vgic-mmio.c vgic_v3_get_vmcr(vcpu, vmcr); vmcr 223 virt/kvm/arm/vgic/vgic-v2.c u32 vmcr; vmcr 225 virt/kvm/arm/vgic/vgic-v2.c vmcr = (vmcrp->grpen0 << GICH_VMCR_ENABLE_GRP0_SHIFT) & vmcr 227 virt/kvm/arm/vgic/vgic-v2.c vmcr |= (vmcrp->grpen1 << GICH_VMCR_ENABLE_GRP1_SHIFT) & vmcr 229 virt/kvm/arm/vgic/vgic-v2.c vmcr |= (vmcrp->ackctl << GICH_VMCR_ACK_CTL_SHIFT) & vmcr 231 virt/kvm/arm/vgic/vgic-v2.c vmcr |= (vmcrp->fiqen << GICH_VMCR_FIQ_EN_SHIFT) & vmcr 233 virt/kvm/arm/vgic/vgic-v2.c vmcr |= (vmcrp->cbpr << GICH_VMCR_CBPR_SHIFT) & vmcr 235 virt/kvm/arm/vgic/vgic-v2.c vmcr |= (vmcrp->eoim << GICH_VMCR_EOI_MODE_SHIFT) & vmcr 237 virt/kvm/arm/vgic/vgic-v2.c vmcr |= (vmcrp->abpr << GICH_VMCR_ALIAS_BINPOINT_SHIFT) & vmcr 239 virt/kvm/arm/vgic/vgic-v2.c vmcr |= (vmcrp->bpr << GICH_VMCR_BINPOINT_SHIFT) & vmcr 241 virt/kvm/arm/vgic/vgic-v2.c vmcr |= ((vmcrp->pmr >> GICV_PMR_PRIORITY_SHIFT) << vmcr 244 virt/kvm/arm/vgic/vgic-v2.c cpu_if->vgic_vmcr = vmcr; vmcr 250 virt/kvm/arm/vgic/vgic-v2.c u32 vmcr; vmcr 252 virt/kvm/arm/vgic/vgic-v2.c vmcr = cpu_if->vgic_vmcr; vmcr 254 virt/kvm/arm/vgic/vgic-v2.c vmcrp->grpen0 = (vmcr & GICH_VMCR_ENABLE_GRP0_MASK) >> vmcr 256 virt/kvm/arm/vgic/vgic-v2.c vmcrp->grpen1 = (vmcr & GICH_VMCR_ENABLE_GRP1_MASK) >> vmcr 258 virt/kvm/arm/vgic/vgic-v2.c vmcrp->ackctl = (vmcr & GICH_VMCR_ACK_CTL_MASK) >> vmcr 260 virt/kvm/arm/vgic/vgic-v2.c vmcrp->fiqen = (vmcr & GICH_VMCR_FIQ_EN_MASK) >> vmcr 262 virt/kvm/arm/vgic/vgic-v2.c vmcrp->cbpr = (vmcr & GICH_VMCR_CBPR_MASK) >> vmcr 264 virt/kvm/arm/vgic/vgic-v2.c vmcrp->eoim = (vmcr & GICH_VMCR_EOI_MODE_MASK) >> vmcr 267 virt/kvm/arm/vgic/vgic-v2.c vmcrp->abpr = (vmcr & GICH_VMCR_ALIAS_BINPOINT_MASK) >> vmcr 269 virt/kvm/arm/vgic/vgic-v2.c vmcrp->bpr = (vmcr & GICH_VMCR_BINPOINT_MASK) >> vmcr 271 virt/kvm/arm/vgic/vgic-v2.c vmcrp->pmr = ((vmcr & GICH_VMCR_PRIMASK_MASK) >> vmcr 209 virt/kvm/arm/vgic/vgic-v3.c u32 vmcr; vmcr 212 virt/kvm/arm/vgic/vgic-v3.c vmcr = (vmcrp->ackctl << ICH_VMCR_ACK_CTL_SHIFT) & vmcr 214 virt/kvm/arm/vgic/vgic-v3.c vmcr |= (vmcrp->fiqen << ICH_VMCR_FIQ_EN_SHIFT) & vmcr 221 virt/kvm/arm/vgic/vgic-v3.c vmcr = ICH_VMCR_FIQ_EN_MASK; vmcr 224 virt/kvm/arm/vgic/vgic-v3.c vmcr |= (vmcrp->cbpr << ICH_VMCR_CBPR_SHIFT) & ICH_VMCR_CBPR_MASK; vmcr 225 virt/kvm/arm/vgic/vgic-v3.c vmcr |= (vmcrp->eoim << ICH_VMCR_EOIM_SHIFT) & ICH_VMCR_EOIM_MASK; vmcr 226 virt/kvm/arm/vgic/vgic-v3.c vmcr |= (vmcrp->abpr << ICH_VMCR_BPR1_SHIFT) & ICH_VMCR_BPR1_MASK; vmcr 227 virt/kvm/arm/vgic/vgic-v3.c vmcr |= (vmcrp->bpr << ICH_VMCR_BPR0_SHIFT) & ICH_VMCR_BPR0_MASK; vmcr 228 virt/kvm/arm/vgic/vgic-v3.c vmcr |= (vmcrp->pmr << ICH_VMCR_PMR_SHIFT) & ICH_VMCR_PMR_MASK; vmcr 229 virt/kvm/arm/vgic/vgic-v3.c vmcr |= (vmcrp->grpen0 << ICH_VMCR_ENG0_SHIFT) & ICH_VMCR_ENG0_MASK; vmcr 230 virt/kvm/arm/vgic/vgic-v3.c vmcr |= (vmcrp->grpen1 << ICH_VMCR_ENG1_SHIFT) & ICH_VMCR_ENG1_MASK; vmcr 232 virt/kvm/arm/vgic/vgic-v3.c cpu_if->vgic_vmcr = vmcr; vmcr 239 virt/kvm/arm/vgic/vgic-v3.c u32 vmcr; vmcr 241 virt/kvm/arm/vgic/vgic-v3.c vmcr = cpu_if->vgic_vmcr; vmcr 244 virt/kvm/arm/vgic/vgic-v3.c vmcrp->ackctl = (vmcr & ICH_VMCR_ACK_CTL_MASK) >> vmcr 246 virt/kvm/arm/vgic/vgic-v3.c vmcrp->fiqen = (vmcr & ICH_VMCR_FIQ_EN_MASK) >> vmcr 257 virt/kvm/arm/vgic/vgic-v3.c vmcrp->cbpr = (vmcr & ICH_VMCR_CBPR_MASK) >> ICH_VMCR_CBPR_SHIFT; vmcr 258 virt/kvm/arm/vgic/vgic-v3.c vmcrp->eoim = (vmcr & ICH_VMCR_EOIM_MASK) >> ICH_VMCR_EOIM_SHIFT; vmcr 259 virt/kvm/arm/vgic/vgic-v3.c vmcrp->abpr = (vmcr & ICH_VMCR_BPR1_MASK) >> ICH_VMCR_BPR1_SHIFT; vmcr 260 virt/kvm/arm/vgic/vgic-v3.c vmcrp->bpr = (vmcr & ICH_VMCR_BPR0_MASK) >> ICH_VMCR_BPR0_SHIFT; vmcr 261 virt/kvm/arm/vgic/vgic-v3.c vmcrp->pmr = (vmcr & ICH_VMCR_PMR_MASK) >> ICH_VMCR_PMR_SHIFT; vmcr 262 virt/kvm/arm/vgic/vgic-v3.c vmcrp->grpen0 = (vmcr & ICH_VMCR_ENG0_MASK) >> ICH_VMCR_ENG0_SHIFT; vmcr 263 virt/kvm/arm/vgic/vgic-v3.c vmcrp->grpen1 = (vmcr & ICH_VMCR_ENG1_MASK) >> ICH_VMCR_ENG1_SHIFT; vmcr 954 virt/kvm/arm/vgic/vgic.c struct vgic_vmcr vmcr; vmcr 962 virt/kvm/arm/vgic/vgic.c vgic_get_vmcr(vcpu, &vmcr); vmcr 970 virt/kvm/arm/vgic/vgic.c irq->priority < vmcr.pmr; vmcr 186 virt/kvm/arm/vgic/vgic.h void vgic_v2_set_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr); vmcr 187 virt/kvm/arm/vgic/vgic.h void vgic_v2_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr); vmcr 215 virt/kvm/arm/vgic/vgic.h void vgic_v3_set_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr); vmcr 216 virt/kvm/arm/vgic/vgic.h void vgic_v3_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr); vmcr 247 virt/kvm/arm/vgic/vgic.h void vgic_set_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr); vmcr 248 virt/kvm/arm/vgic/vgic.h void vgic_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr);