VGA_TEST_CONTROL 209 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h SR(VGA_TEST_CONTROL), \ VGA_TEST_CONTROL 423 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h uint32_t VGA_TEST_CONTROL; VGA_TEST_CONTROL 576 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, VGA_TEST_CONTROL, VGA_TEST_ENABLE, mask_sh),\ VGA_TEST_CONTROL 577 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, VGA_TEST_CONTROL, VGA_TEST_RENDER_START, mask_sh),\ VGA_TEST_CONTROL 492 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c REG_UPDATE(VGA_TEST_CONTROL, VGA_TEST_ENABLE, 1); VGA_TEST_CONTROL 493 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c REG_UPDATE(VGA_TEST_CONTROL, VGA_TEST_RENDER_START, 1);