video_div_table   109 drivers/clk/imx/clk-imx6q.c static struct clk_div_table video_div_table[] = {
video_div_table   471 drivers/clk/imx/clk-imx6q.c 		video_div_table[1].div = 1;
video_div_table   472 drivers/clk/imx/clk-imx6q.c 		video_div_table[3].div = 1;
video_div_table   603 drivers/clk/imx/clk-imx6q.c 	hws[IMX6QDL_CLK_PLL5_VIDEO_DIV] = clk_hw_register_divider_table(NULL, "pll5_video_div", "pll5_post_div", CLK_SET_RATE_PARENT, base + 0x170, 30, 2, 0, video_div_table, &imx_ccm_lock);
video_div_table    85 drivers/clk/imx/clk-imx6sl.c static const struct clk_div_table video_div_table[] = {
video_div_table   275 drivers/clk/imx/clk-imx6sl.c 	hws[IMX6SL_CLK_PLL5_VIDEO_DIV] = clk_hw_register_divider_table(NULL, "pll5_video_div", "pll5_post_div", CLK_SET_RATE_PARENT, base + 0x170, 30, 2,   0, video_div_table, &imx_ccm_lock);
video_div_table    66 drivers/clk/imx/clk-imx6sll.c static const struct clk_div_table video_div_table[] = {
video_div_table   198 drivers/clk/imx/clk-imx6sll.c 		 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x170, 30, 2, 0, video_div_table, &imx_ccm_lock);
video_div_table   102 drivers/clk/imx/clk-imx6sx.c static const struct clk_div_table video_div_table[] = {
video_div_table   261 drivers/clk/imx/clk-imx6sx.c 				CLK_SET_RATE_PARENT, base + 0x170, 30, 2, 0, video_div_table, &imx_ccm_lock);
video_div_table    89 drivers/clk/imx/clk-imx6ul.c static const struct clk_div_table video_div_table[] = {
video_div_table   225 drivers/clk/imx/clk-imx6ul.c 		 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x170, 30, 2, 0, video_div_table, &imx_ccm_lock);