vga_render_control 896 drivers/gpu/drm/amd/amdgpu/cik.c u32 vga_render_control = 0; vga_render_control 904 drivers/gpu/drm/amd/amdgpu/cik.c vga_render_control = RREG32(mmVGA_RENDER_CONTROL); vga_render_control 919 drivers/gpu/drm/amd/amdgpu/cik.c (vga_render_control & ~VGA_RENDER_CONTROL__VGA_VSTATUS_CNTL_MASK)); vga_render_control 930 drivers/gpu/drm/amd/amdgpu/cik.c WREG32(mmVGA_RENDER_CONTROL, vga_render_control); vga_render_control 1116 drivers/gpu/drm/amd/amdgpu/si.c u32 vga_render_control = 0; vga_render_control 1124 drivers/gpu/drm/amd/amdgpu/si.c vga_render_control = RREG32(VGA_RENDER_CONTROL); vga_render_control 1139 drivers/gpu/drm/amd/amdgpu/si.c (vga_render_control & C_000300_VGA_VSTATUS_CNTL)); vga_render_control 1150 drivers/gpu/drm/amd/amdgpu/si.c WREG32(VGA_RENDER_CONTROL, vga_render_control); vga_render_control 380 drivers/gpu/drm/amd/amdgpu/vi.c u32 vga_render_control = 0; vga_render_control 388 drivers/gpu/drm/amd/amdgpu/vi.c vga_render_control = RREG32(mmVGA_RENDER_CONTROL); vga_render_control 403 drivers/gpu/drm/amd/amdgpu/vi.c (vga_render_control & ~VGA_RENDER_CONTROL__VGA_VSTATUS_CNTL_MASK)); vga_render_control 414 drivers/gpu/drm/amd/amdgpu/vi.c WREG32(mmVGA_RENDER_CONTROL, vga_render_control); vga_render_control 2671 drivers/gpu/drm/radeon/evergreen.c save->vga_render_control = RREG32(VGA_RENDER_CONTROL); vga_render_control 2846 drivers/gpu/drm/radeon/evergreen.c WREG32(VGA_RENDER_CONTROL, save->vga_render_control); vga_render_control 278 drivers/gpu/drm/radeon/radeon_asic.h u32 vga_render_control; vga_render_control 505 drivers/gpu/drm/radeon/radeon_asic.h u32 vga_render_control; vga_render_control 256 drivers/gpu/drm/radeon/radeon_bios.c u32 vga_render_control; vga_render_control 263 drivers/gpu/drm/radeon/radeon_bios.c vga_render_control = RREG32(AVIVO_VGA_RENDER_CONTROL); vga_render_control 277 drivers/gpu/drm/radeon/radeon_bios.c (vga_render_control & ~AVIVO_VGA_VSTATUS_CNTL_MASK)); vga_render_control 288 drivers/gpu/drm/radeon/radeon_bios.c WREG32(AVIVO_VGA_RENDER_CONTROL, vga_render_control); vga_render_control 300 drivers/gpu/drm/radeon/radeon_bios.c uint32_t vga_render_control; vga_render_control 310 drivers/gpu/drm/radeon/radeon_bios.c vga_render_control = RREG32(AVIVO_VGA_RENDER_CONTROL); vga_render_control 325 drivers/gpu/drm/radeon/radeon_bios.c (vga_render_control & ~AVIVO_VGA_VSTATUS_CNTL_MASK)); vga_render_control 358 drivers/gpu/drm/radeon/radeon_bios.c WREG32(AVIVO_VGA_RENDER_CONTROL, vga_render_control); vga_render_control 369 drivers/gpu/drm/radeon/radeon_bios.c uint32_t vga_render_control; vga_render_control 383 drivers/gpu/drm/radeon/radeon_bios.c vga_render_control = RREG32(AVIVO_VGA_RENDER_CONTROL); vga_render_control 404 drivers/gpu/drm/radeon/radeon_bios.c (vga_render_control & ~AVIVO_VGA_VSTATUS_CNTL_MASK)); vga_render_control 429 drivers/gpu/drm/radeon/radeon_bios.c WREG32(AVIVO_VGA_RENDER_CONTROL, vga_render_control); vga_render_control 447 drivers/gpu/drm/radeon/radeon_bios.c uint32_t vga_render_control; vga_render_control 458 drivers/gpu/drm/radeon/radeon_bios.c vga_render_control = RREG32(AVIVO_VGA_RENDER_CONTROL); vga_render_control 484 drivers/gpu/drm/radeon/radeon_bios.c (vga_render_control & ~AVIVO_VGA_VSTATUS_CNTL_MASK)); vga_render_control 494 drivers/gpu/drm/radeon/radeon_bios.c WREG32(AVIVO_VGA_RENDER_CONTROL, vga_render_control); vga_render_control 303 drivers/gpu/drm/radeon/rv515.c save->vga_render_control = RREG32(R_000300_VGA_RENDER_CONTROL); vga_render_control 467 drivers/gpu/drm/radeon/rv515.c WREG32(R_000300_VGA_RENDER_CONTROL, save->vga_render_control);