vf_nr 224 drivers/crypto/qat/qat_common/adf_accel_devices.h u32 vf_nr; vf_nr 109 drivers/crypto/qat/qat_common/adf_common_drv.h int adf_iov_putmsg(struct adf_accel_dev *accel_dev, u32 msg, u8 vf_nr); vf_nr 142 drivers/crypto/qat/qat_common/adf_isr.c vf_info->vf_nr + 1); vf_nr 126 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c static int __adf_iov_putmsg(struct adf_accel_dev *accel_dev, u32 msg, u8 vf_nr) vf_nr 148 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c pf2vf_offset = hw_data->get_pf2vf_offset(vf_nr); vf_nr 149 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c lock = &accel_dev->pf.vf_info[vf_nr].pf2vf_lock; vf_nr 221 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c int adf_iov_putmsg(struct adf_accel_dev *accel_dev, u32 msg, u8 vf_nr) vf_nr 227 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c ret = __adf_iov_putmsg(accel_dev, msg, vf_nr); vf_nr 243 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c u32 msg, resp = 0, vf_nr = vf_info->vf_nr; vf_nr 246 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c msg = ADF_CSR_RD(pmisc_addr, hw_data->get_pf2vf_offset(vf_nr)); vf_nr 250 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c ADF_CSR_WR(pmisc_addr, hw_data->get_pf2vf_offset(vf_nr), msg); vf_nr 269 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c vf_nr + 1, vf_compat_ver); vf_nr 295 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c vf_nr + 1, msg); vf_nr 311 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c vf_nr + 1, msg); vf_nr 319 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c vf_nr + 1, msg); vf_nr 327 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c if (resp && adf_iov_putmsg(accel_dev, resp, vf_nr)) vf_nr 331 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c adf_enable_vf2pf_interrupts(accel_dev, (1 << vf_nr)); vf_nr 335 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c vf_nr + 1, msg); vf_nr 126 drivers/crypto/qat/qat_common/adf_sriov.c vf_info->vf_nr = i;