vert 36 arch/x86/events/intel/p4.c #define P4_GEN_PEBS_BIND(name, pebs, vert) \ vert 39 arch/x86/events/intel/p4.c .metric_vert = vert, \ vert 2805 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->v_scale_ratio[num_displays + 4] = fixed31_32_to_bw_fixed(pipe[i].plane_res.scl_data.ratios.vert.value); vert 2862 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c pipe[i].bottom_pipe->plane_res.scl_data.ratios.vert.value); vert 2907 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->v_scale_ratio[num_displays + 4] = fixed31_32_to_bw_fixed(pipe[i].plane_res.scl_data.ratios.vert.value); vert 389 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c input->scale_ratio_depth.vscl_ratio = pipe->plane_res.scl_data.ratios.vert.value/4294967296.0; vert 951 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c ASSERT(pipe->plane_res.scl_data.ratios.vert.value != dc_fixpt_one.value vert 956 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c ASSERT(pipe->plane_res.scl_data.ratios.vert.value != dc_fixpt_one.value vert 731 drivers/gpu/drm/amd/display/dc/core/dc_resource.c pipe_ctx->plane_res.scl_data.ratios.vert = dc_fixpt_from_fraction( vert 738 drivers/gpu/drm/amd/display/dc/core/dc_resource.c pipe_ctx->plane_res.scl_data.ratios.vert.value *= 2; vert 740 drivers/gpu/drm/amd/display/dc/core/dc_resource.c pipe_ctx->plane_res.scl_data.ratios.vert.value = div64_s64( vert 741 drivers/gpu/drm/amd/display/dc/core/dc_resource.c pipe_ctx->plane_res.scl_data.ratios.vert.value * in_h, out_h); vert 746 drivers/gpu/drm/amd/display/dc/core/dc_resource.c pipe_ctx->plane_res.scl_data.ratios.vert_c = pipe_ctx->plane_res.scl_data.ratios.vert; vert 755 drivers/gpu/drm/amd/display/dc/core/dc_resource.c pipe_ctx->plane_res.scl_data.ratios.vert = dc_fixpt_truncate( vert 756 drivers/gpu/drm/amd/display/dc/core/dc_resource.c pipe_ctx->plane_res.scl_data.ratios.vert, 19); vert 903 drivers/gpu/drm/amd/display/dc/core/dc_resource.c dc_fixpt_add_int(data->ratios.vert, data->taps.v_taps + 1), 2), 19); vert 917 drivers/gpu/drm/amd/display/dc/core/dc_resource.c orthogonal_rotation ? data->ratios.vert : data->ratios.horz, vert 935 drivers/gpu/drm/amd/display/dc/core/dc_resource.c orthogonal_rotation ? data->ratios.horz : data->ratios.vert, vert 950 drivers/gpu/drm/amd/display/dc/core/dc_resource.c data->inits.v_bot = dc_fixpt_add(data->inits.v, data->ratios.vert); vert 261 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c dc_fixpt_u2d19(data->ratios.vert) << 5; vert 275 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c data->ratios.vert, vert 352 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c coeffs_v = get_filter_coeffs_16p(data->taps.v_taps, data->ratios.vert); vert 923 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c scl_data->taps.v_taps = decide_taps(scl_data->ratios.vert, in_taps->v_taps, false); vert 927 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c if (!IDENTITY_RATIO(scl_data->ratios.vert)) { vert 2693 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c .v_scale_ratio = pipe_ctx->plane_res.scl_data.ratios.vert, vert 380 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c dc_fixpt_u2d19(data->ratios.vert) << 5; vert 562 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c coeffs_v = get_filter_coeffs_64p(data->taps.v_taps, data->ratios.vert); vert 148 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c scl_data->ratios.vert.value != dc_fixpt_one.value) vert 161 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c if (scl_data->ratios.vert.value == (4ll << 32)) vert 162 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c scl_data->ratios.vert.value--; vert 192 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c if (IDENTITY_RATIO(scl_data->ratios.vert)) vert 181 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c && data->ratios.vert.value == one vert 193 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c if (data->ratios.horz.value == one && data->ratios.vert.value == one) vert 308 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c uint32_t v_2tap_sharp_factor = scl_data->sharpness.vert; vert 339 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c scl_data->taps.v_taps, scl_data->ratios.vert); vert 485 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c int ceil_vratio = dc_fixpt_ceil(scl_data->ratios.vert); vert 589 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c SCL_V_SCALE_RATIO, dc_fixpt_u3d19(data->ratios.vert) << 5); vert 2964 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c .v_scale_ratio = pipe_ctx->plane_res.scl_data.ratios.vert, vert 403 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.c if (scl_data->ratios.vert.value == (8ll << 32)) vert 404 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.c scl_data->ratios.vert.value--; vert 419 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.c if (dc_fixpt_ceil(scl_data->ratios.vert) > 4) vert 446 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.c if (IDENTITY_RATIO(scl_data->ratios.vert)) vert 2116 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.scale_ratio_depth.vscl_ratio = (double) scl->ratios.vert.value / (1ULL<<32); vert 2119 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c scl->ratios.vert.value != dc_fixpt_one.value vert 143 drivers/gpu/drm/amd/display/dc/inc/hw/transform.h struct fixed31_32 vert; vert 150 drivers/gpu/drm/amd/display/dc/inc/hw/transform.h int vert; vert 589 drivers/gpu/ipu-v3/ipu-csi.c void ipu_csi_set_downsize(struct ipu_csi *csi, bool horiz, bool vert) vert 599 drivers/gpu/ipu-v3/ipu-csi.c (vert ? CSI_VERT_DOWNSIZE_EN : 0); vert 356 drivers/media/platform/davinci/isif.c (bc->vert.reset_val_sel << ISIF_VERT_BC_RST_VAL_SEL_SHIFT) | vert 357 drivers/media/platform/davinci/isif.c (bc->vert.line_ave_coef << ISIF_VERT_BC_LINE_AVE_COEF_SHIFT); vert 361 drivers/media/platform/davinci/isif.c regw(bc->vert.ob_start_h, CLVWIN1); vert 363 drivers/media/platform/davinci/isif.c regw(bc->vert.ob_start_v, CLVWIN2); vert 365 drivers/media/platform/davinci/isif.c regw(bc->vert.ob_v_sz_calc, CLVWIN3); vert 317 drivers/media/platform/omap3isp/ispresizer.c rgval |= ((ratio->vert - 1) << ISPRSZ_CNT_VRSZ_SHIFT) vert 328 drivers/media/platform/omap3isp/ispresizer.c if (ratio->vert > MID_RESIZE_VALUE) vert 805 drivers/media/platform/omap3isp/ispresizer.c ratio->vert = ((input->height - 4) * 256 + 255 - 16 - 32 * spv) vert 807 drivers/media/platform/omap3isp/ispresizer.c if (ratio->vert > MID_RESIZE_VALUE) vert 808 drivers/media/platform/omap3isp/ispresizer.c ratio->vert = ((input->height - 7) * 256 + 255 - 32 - 64 * spv) vert 810 drivers/media/platform/omap3isp/ispresizer.c ratio->vert = clamp_t(unsigned int, ratio->vert, vert 813 drivers/media/platform/omap3isp/ispresizer.c if (ratio->vert <= MID_RESIZE_VALUE) { vert 814 drivers/media/platform/omap3isp/ispresizer.c upscaled_height = (output->height - 1) * ratio->vert vert 818 drivers/media/platform/omap3isp/ispresizer.c upscaled_height = (output->height - 1) * ratio->vert vert 830 drivers/media/platform/omap3isp/ispresizer.c if (ratio->vert <= MID_RESIZE_VALUE) { vert 871 drivers/media/platform/omap3isp/ispresizer.c width_alignment = ratio->vert < 256 ? 8 : 2; vert 61 drivers/media/platform/omap3isp/ispresizer.h u32 vert; vert 117 include/drm/drm_rect.h static inline void drm_rect_downscale(struct drm_rect *r, int horz, int vert) vert 120 include/drm/drm_rect.h r->y1 /= vert; vert 122 include/drm/drm_rect.h r->y2 /= vert; vert 185 include/media/davinci/isif.h struct isif_vert_bclamp vert; vert 365 include/video/imx-ipu-v3.h void ipu_csi_set_downsize(struct ipu_csi *csi, bool horiz, bool vert);