ver_total          76 drivers/gpu/drm/radeon/radeon_legacy_tv.c 	uint16_t ver_total;
ver_total         440 drivers/gpu/drm/radeon/radeon_legacy_tv.c 	v_total = const_ptr->ver_total;
ver_total         609 drivers/gpu/drm/radeon/radeon_legacy_tv.c 		vert_space = const_ptr->ver_total * 2 * 10000 / NTSC_TV_LINES_PER_FRAME;
ver_total         611 drivers/gpu/drm/radeon/radeon_legacy_tv.c 		vert_space = const_ptr->ver_total * 2 * 10000 / PAL_TV_LINES_PER_FRAME;
ver_total         627 drivers/gpu/drm/radeon/radeon_legacy_tv.c 	tmp = const_ptr->ver_total * 2 * 1000;
ver_total         786 drivers/gpu/drm/radeon/radeon_legacy_tv.c 	WREG32(RADEON_TV_VTOTAL, const_ptr->ver_total - 1);
ver_total         852 drivers/gpu/drm/radeon/radeon_legacy_tv.c 		((const_ptr->ver_total - 1) << RADEON_CRTC_V_TOTAL_SHIFT);
ver_total        1470 drivers/video/fbdev/via/hw.c 	timing.ver_total = timing.ver_sync_end + var->upper_margin + dy;
ver_total        1472 drivers/video/fbdev/via/hw.c 	timing.ver_blank_end = timing.ver_total - dy;
ver_total          28 drivers/video/fbdev/via/via_modesetting.c 	raw.ver_total = timing->ver_total - 2;
ver_total          45 drivers/video/fbdev/via/via_modesetting.c 	via_write_reg(VIACR, 0x06, raw.ver_total & 0xFF);
ver_total          46 drivers/video/fbdev/via/via_modesetting.c 	via_write_reg_mask(VIACR, 0x07, (raw.ver_total >> 8 & 0x01)
ver_total          50 drivers/video/fbdev/via/via_modesetting.c 		| (raw.ver_total >> (9 - 5) & 0x20)
ver_total          62 drivers/video/fbdev/via/via_modesetting.c 	via_write_reg_mask(VIACR, 0x35, (raw.ver_total >> 10 & 0x01)
ver_total          86 drivers/video/fbdev/via/via_modesetting.c 	raw.ver_total = timing->ver_total - 1;
ver_total         104 drivers/video/fbdev/via/via_modesetting.c 	via_write_reg(VIACR, 0x58, raw.ver_total & 0xFF);
ver_total         112 drivers/video/fbdev/via/via_modesetting.c 	via_write_reg(VIACR, 0x5D, (raw.ver_total >> 8 & 0x07)
ver_total          28 drivers/video/fbdev/via/via_modesetting.h 	u16 ver_total;