vddgfx 1914 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c u32 vddgfx; vddgfx 1915 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c int r, size = sizeof(vddgfx); vddgfx 1924 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c (void *)&vddgfx, &size); vddgfx 1928 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c return snprintf(buf, PAGE_SIZE, "%d\n", vddgfx); vddgfx 38 drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr_ppt.h uint16_t vddgfx; vddgfx 67 drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr_ppt.h uint16_t vddgfx; vddgfx 362 drivers/gpu/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c limits->vddgfx = le16_to_cpu(limitable->entries[0].usVddgfxLimit); vddgfx 1698 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c uint16_t vddgfx = 0; vddgfx 1727 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c vv_id, &vddgfx)) { vddgfx 1729 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c PP_ASSERT_WITH_CODE((vddgfx < 2000 && vddgfx != 0), "Invalid VDDGFX value!", return -EINVAL); vddgfx 1732 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c if (vddgfx != 0 && vddgfx != vv_id) { vddgfx 1733 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c data->vddcgfx_leakage.actual_voltage[data->vddcgfx_leakage.count] = vddgfx; vddgfx 1861 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c sclk_table->entries[entry_id].vddgfx = vddgfx 1938 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c v_record.us_vdd = sclk_table->entries[entry_id].vddgfx + vddgfx 1941 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c v_record.us_vdd = sclk_table->entries[entry_id].vddgfx + vddgfx 1959 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c mclk_table->entries[entry_id].vddgfx = v_record.us_cac_low = vddgfx 1985 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c mm_table->entries[entry_id].vddgfx = v_record.us_cac_low = vddgfx 2033 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c &table_info->max_clock_voltage_on_dc.vddgfx, &(data->vddcgfx_leakage)); vddgfx 4906 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c podn_vdd_dep_in_backend->entries[input_level].vddgfx = input_vol; vddgfx 1691 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c uint16_t vddnb, vddgfx; vddgfx 1716 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c vddgfx = smu8_convert_8Bit_index_to_voltage(hwmgr, (u16)tmp) / 4; vddgfx 1717 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c *((uint32_t *)value) = vddgfx; vddgfx 693 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c dep_table->entries[i].vddgfx = allowed_dep_table->entries[i].vddgfx; vddgfx 516 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h uint16_t vddgfx; vddgfx 264 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c allowed_clock_voltage_table->entries[i].vddgfx); vddgfx 288 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c allowed_clock_voltage_table->entries[i-1].vddgfx); vddgfx 1332 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c mm_table->entries[count].vddgfx) : 0; vddgfx 1392 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c mm_table->entries[count].vddgfx) : 0; vddgfx 1437 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c mm_table->entries[count].vddgfx) : 0;