vddc_dependency_on_sclk 1361 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c u32 count = adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count; vddc_dependency_on_sclk 1365 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c if (adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[entry_id].v == vddc_dependency_on_sclk 1377 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c cpu_to_le32(adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[entry_id].clk); vddc_dependency_on_sclk 334 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c ret = amdgpu_parse_clk_voltage_dep_table(&adev->pm.dpm.dyn_state.vddc_dependency_on_sclk, vddc_dependency_on_sclk 723 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c kfree(dyn_state->vddc_dependency_on_sclk.entries); vddc_dependency_on_sclk 208 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h struct amdgpu_clock_voltage_dependency_table vddc_dependency_on_sclk; vddc_dependency_on_sclk 76 drivers/gpu/drm/amd/amdgpu/kv_dpm.c &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk; vddc_dependency_on_sclk 98 drivers/gpu/drm/amd/amdgpu/kv_dpm.c &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk; vddc_dependency_on_sclk 803 drivers/gpu/drm/amd/amdgpu/kv_dpm.c &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk; vddc_dependency_on_sclk 1164 drivers/gpu/drm/amd/amdgpu/kv_dpm.c &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk; vddc_dependency_on_sclk 1778 drivers/gpu/drm/amd/amdgpu/kv_dpm.c &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk; vddc_dependency_on_sclk 2174 drivers/gpu/drm/amd/amdgpu/kv_dpm.c &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk; vddc_dependency_on_sclk 2215 drivers/gpu/drm/amd/amdgpu/kv_dpm.c &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk; vddc_dependency_on_sclk 2419 drivers/gpu/drm/amd/amdgpu/kv_dpm.c &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk; vddc_dependency_on_sclk 3508 drivers/gpu/drm/amd/amdgpu/si_dpm.c btc_get_max_clock_from_voltage_dependency_table(&adev->pm.dpm.dyn_state.vddc_dependency_on_sclk, vddc_dependency_on_sclk 3614 drivers/gpu/drm/amd/amdgpu/si_dpm.c btc_apply_voltage_dependency_rules(&adev->pm.dpm.dyn_state.vddc_dependency_on_sclk, vddc_dependency_on_sclk 4620 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries == NULL) vddc_dependency_on_sclk 4623 drivers/gpu/drm/amd/amdgpu/si_dpm.c for (v_index = 0; (u32)v_index < adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count; v_index++) { vddc_dependency_on_sclk 4625 drivers/gpu/drm/amd/amdgpu/si_dpm.c (u16)adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) { vddc_dependency_on_sclk 4638 drivers/gpu/drm/amd/amdgpu/si_dpm.c for (v_index = 0; (u32)v_index < adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count; v_index++) { vddc_dependency_on_sclk 4640 drivers/gpu/drm/amd/amdgpu/si_dpm.c (u16)adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) { vddc_dependency_on_sclk 6358 drivers/gpu/drm/amd/amdgpu/si_dpm.c &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk); vddc_dependency_on_sclk 1130 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c for (entry_id = 0; entry_id < hwmgr->dyn_state.vddc_dependency_on_sclk->count; entry_id++) { vddc_dependency_on_sclk 1131 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c if (hwmgr->dyn_state.vddc_dependency_on_sclk->entries[entry_id].v == virtual_voltage_id) { vddc_dependency_on_sclk 1137 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c if (entry_id >= hwmgr->dyn_state.vddc_dependency_on_sclk->count) { vddc_dependency_on_sclk 1146 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c cpu_to_le32(hwmgr->dyn_state.vddc_dependency_on_sclk->entries[entry_id].clk); vddc_dependency_on_sclk 1239 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c hwmgr->dyn_state.vddc_dependency_on_sclk = NULL; vddc_dependency_on_sclk 1335 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c &hwmgr->dyn_state.vddc_dependency_on_sclk, table); vddc_dependency_on_sclk 1367 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c if(result == 0 && (NULL != hwmgr->dyn_state.vddc_dependency_on_sclk) && vddc_dependency_on_sclk 1368 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c (0 != hwmgr->dyn_state.vddc_dependency_on_sclk->count)) vddc_dependency_on_sclk 1371 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c hwmgr->dyn_state.vddc_dependency_on_sclk); vddc_dependency_on_sclk 1676 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c kfree(hwmgr->dyn_state.vddc_dependency_on_sclk); vddc_dependency_on_sclk 1677 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c hwmgr->dyn_state.vddc_dependency_on_sclk = NULL; vddc_dependency_on_sclk 672 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c hwmgr->dyn_state.vddc_dependency_on_sclk; vddc_dependency_on_sclk 2402 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c tmp = smu7_patch_vddc(hwmgr, hwmgr->dyn_state.vddc_dependency_on_sclk); vddc_dependency_on_sclk 2458 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c struct phm_clock_voltage_dependency_table *allowed_sclk_vddc_table = hwmgr->dyn_state.vddc_dependency_on_sclk; vddc_dependency_on_sclk 2755 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c for (count = hwmgr->dyn_state.vddc_dependency_on_sclk->count-1; vddc_dependency_on_sclk 2757 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c if (tmp_sclk >= hwmgr->dyn_state.vddc_dependency_on_sclk->entries[count].clk) { vddc_dependency_on_sclk 2758 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c tmp_sclk = hwmgr->dyn_state.vddc_dependency_on_sclk->entries[count].clk; vddc_dependency_on_sclk 2765 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c tmp_sclk = hwmgr->dyn_state.vddc_dependency_on_sclk->entries[0].clk; vddc_dependency_on_sclk 2769 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c *sclk_mask = hwmgr->dyn_state.vddc_dependency_on_sclk->count-1; vddc_dependency_on_sclk 4667 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c sclk_table = hwmgr->dyn_state.vddc_dependency_on_sclk; vddc_dependency_on_sclk 104 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c hwmgr->dyn_state.vddc_dependency_on_sclk; vddc_dependency_on_sclk 260 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c hwmgr->dyn_state.vddc_dependency_on_sclk; vddc_dependency_on_sclk 442 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c hwmgr->dyn_state.vddc_dependency_on_sclk; vddc_dependency_on_sclk 556 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c hwmgr->dyn_state.vddc_dependency_on_sclk; vddc_dependency_on_sclk 685 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c hwmgr->dyn_state.vddc_dependency_on_sclk; vddc_dependency_on_sclk 1145 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c hwmgr->dyn_state.vddc_dependency_on_sclk; vddc_dependency_on_sclk 1344 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c hwmgr->dyn_state.vddc_dependency_on_sclk; vddc_dependency_on_sclk 1517 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c hwmgr->dyn_state.vddc_dependency_on_sclk; vddc_dependency_on_sclk 1615 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c table = hwmgr->dyn_state.vddc_dependency_on_sclk; vddc_dependency_on_sclk 1634 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c hwmgr->dyn_state.vddc_dependency_on_sclk; vddc_dependency_on_sclk 1675 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c hwmgr->dyn_state.vddc_dependency_on_sclk; vddc_dependency_on_sclk 621 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h struct phm_clock_voltage_dependency_table *vddc_dependency_on_sclk; vddc_dependency_on_sclk 417 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c hwmgr->dyn_state.vddc_dependency_on_sclk, clock, vddc_dependency_on_sclk 587 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c PP_ASSERT_WITH_CODE(hwmgr->dyn_state.cac_leakage_table->count == hwmgr->dyn_state.vddc_dependency_on_sclk->count, vddc_dependency_on_sclk 771 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c PP_ASSERT_WITH_CODE(NULL != hwmgr->dyn_state.vddc_dependency_on_sclk, vddc_dependency_on_sclk 780 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c for (v_index = 0; (uint32_t)v_index < hwmgr->dyn_state.vddc_dependency_on_sclk->count; v_index++) { vddc_dependency_on_sclk 781 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c if (tab->value == hwmgr->dyn_state.vddc_dependency_on_sclk->entries[v_index].v) { vddc_dependency_on_sclk 796 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c for (v_index = 0; (uint32_t)v_index < hwmgr->dyn_state.vddc_dependency_on_sclk->count; v_index++) { vddc_dependency_on_sclk 797 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c if (tab->value <= hwmgr->dyn_state.vddc_dependency_on_sclk->entries[v_index].v) { vddc_dependency_on_sclk 965 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c if (ulv_voltage > hwmgr->dyn_state.vddc_dependency_on_sclk->entries[0].v) vddc_dependency_on_sclk 969 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c state->VddcOffset = (uint16_t)(hwmgr->dyn_state.vddc_dependency_on_sclk->entries[0].v - ulv_voltage); vddc_dependency_on_sclk 972 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c if (ulv_voltage > hwmgr->dyn_state.vddc_dependency_on_sclk->entries[0].v) vddc_dependency_on_sclk 976 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c (hwmgr->dyn_state.vddc_dependency_on_sclk->entries[0].v - ulv_voltage) vddc_dependency_on_sclk 1858 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c count = (uint8_t)(hwmgr->dyn_state.vddc_dependency_on_sclk->count); vddc_dependency_on_sclk 1861 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c if (hwmgr->dyn_state.vddc_dependency_on_sclk->entries[level].clk vddc_dependency_on_sclk 400 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c PP_ASSERT_WITH_CODE(hwmgr->dyn_state.cac_leakage_table->count == hwmgr->dyn_state.vddc_dependency_on_sclk->count, vddc_dependency_on_sclk 540 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c PP_ASSERT_WITH_CODE(NULL != hwmgr->dyn_state.vddc_dependency_on_sclk, vddc_dependency_on_sclk 554 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c for (v_index = 0; (uint32_t)v_index < hwmgr->dyn_state.vddc_dependency_on_sclk->count; v_index++) { vddc_dependency_on_sclk 555 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c if (tab->value == hwmgr->dyn_state.vddc_dependency_on_sclk->entries[v_index].v) { vddc_dependency_on_sclk 574 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c for (v_index = 0; (uint32_t)v_index < hwmgr->dyn_state.vddc_dependency_on_sclk->count; v_index++) { vddc_dependency_on_sclk 575 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c if (tab->value <= hwmgr->dyn_state.vddc_dependency_on_sclk->entries[v_index].v) { vddc_dependency_on_sclk 734 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c if (ulv_voltage > hwmgr->dyn_state.vddc_dependency_on_sclk->entries[0].v) vddc_dependency_on_sclk 738 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c state->VddcOffset = (uint16_t)(hwmgr->dyn_state.vddc_dependency_on_sclk->entries[0].v - ulv_voltage); vddc_dependency_on_sclk 741 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c if (ulv_voltage > hwmgr->dyn_state.vddc_dependency_on_sclk->entries[0].v) vddc_dependency_on_sclk 745 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c (hwmgr->dyn_state.vddc_dependency_on_sclk->entries[0].v - ulv_voltage) vddc_dependency_on_sclk 902 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c hwmgr->dyn_state.vddc_dependency_on_sclk, engine_clock, vddc_dependency_on_sclk 1826 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c count = (uint8_t)(hwmgr->dyn_state.vddc_dependency_on_sclk->count); vddc_dependency_on_sclk 1829 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c if (hwmgr->dyn_state.vddc_dependency_on_sclk->entries[level].clk vddc_dependency_on_sclk 2210 drivers/gpu/drm/radeon/btc_dpm.c btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk, vddc_dependency_on_sclk 2219 drivers/gpu/drm/radeon/btc_dpm.c btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk, vddc_dependency_on_sclk 2228 drivers/gpu/drm/radeon/btc_dpm.c btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk, vddc_dependency_on_sclk 288 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count) vddc_dependency_on_sclk 2337 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries == NULL) vddc_dependency_on_sclk 2341 drivers/gpu/drm/radeon/ci_dpm.c for (v_index = 0; (u32)v_index < rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count; v_index++) { vddc_dependency_on_sclk 2343 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) { vddc_dependency_on_sclk 2358 drivers/gpu/drm/radeon/ci_dpm.c for (v_index = 0; (u32)v_index < rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count; v_index++) { vddc_dependency_on_sclk 2360 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) { vddc_dependency_on_sclk 2593 drivers/gpu/drm/radeon/ci_dpm.c for (level = 0; level < rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count; level++) { vddc_dependency_on_sclk 2594 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[level].clk >= vddc_dependency_on_sclk 3137 drivers/gpu/drm/radeon/ci_dpm.c if (ulv_voltage > rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[0].v) vddc_dependency_on_sclk 3141 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[0].v - ulv_voltage; vddc_dependency_on_sclk 3143 drivers/gpu/drm/radeon/ci_dpm.c if (ulv_voltage > rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[0].v) vddc_dependency_on_sclk 3147 drivers/gpu/drm/radeon/ci_dpm.c ((rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[0].v - ulv_voltage) * vddc_dependency_on_sclk 3228 drivers/gpu/drm/radeon/ci_dpm.c &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk, vddc_dependency_on_sclk 3445 drivers/gpu/drm/radeon/ci_dpm.c &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; vddc_dependency_on_sclk 3788 drivers/gpu/drm/radeon/ci_dpm.c &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; vddc_dependency_on_sclk 4921 drivers/gpu/drm/radeon/ci_dpm.c &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; vddc_dependency_on_sclk 5067 drivers/gpu/drm/radeon/ci_dpm.c &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk); vddc_dependency_on_sclk 558 drivers/gpu/drm/radeon/kv_dpm.c &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; vddc_dependency_on_sclk 580 drivers/gpu/drm/radeon/kv_dpm.c &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; vddc_dependency_on_sclk 721 drivers/gpu/drm/radeon/kv_dpm.c &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; vddc_dependency_on_sclk 1082 drivers/gpu/drm/radeon/kv_dpm.c &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; vddc_dependency_on_sclk 1714 drivers/gpu/drm/radeon/kv_dpm.c &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; vddc_dependency_on_sclk 2109 drivers/gpu/drm/radeon/kv_dpm.c &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; vddc_dependency_on_sclk 2150 drivers/gpu/drm/radeon/kv_dpm.c &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; vddc_dependency_on_sclk 2354 drivers/gpu/drm/radeon/kv_dpm.c &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; vddc_dependency_on_sclk 875 drivers/gpu/drm/radeon/ni_dpm.c btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk, vddc_dependency_on_sclk 1014 drivers/gpu/drm/radeon/ni_dpm.c &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk); vddc_dependency_on_sclk 926 drivers/gpu/drm/radeon/r600_dpm.c ret = r600_parse_clk_voltage_dep_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk, vddc_dependency_on_sclk 938 drivers/gpu/drm/radeon/r600_dpm.c kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries); vddc_dependency_on_sclk 949 drivers/gpu/drm/radeon/r600_dpm.c kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries); vddc_dependency_on_sclk 961 drivers/gpu/drm/radeon/r600_dpm.c kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries); vddc_dependency_on_sclk 1302 drivers/gpu/drm/radeon/r600_dpm.c kfree(dyn_state->vddc_dependency_on_sclk.entries); vddc_dependency_on_sclk 1470 drivers/gpu/drm/radeon/radeon.h struct radeon_clock_voltage_dependency_table vddc_dependency_on_sclk; vddc_dependency_on_sclk 3316 drivers/gpu/drm/radeon/radeon_atombios.c u32 count = rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count; vddc_dependency_on_sclk 3320 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[entry_id].v == vddc_dependency_on_sclk 3332 drivers/gpu/drm/radeon/radeon_atombios.c cpu_to_le32(rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[entry_id].clk); vddc_dependency_on_sclk 3049 drivers/gpu/drm/radeon/si_dpm.c btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk, vddc_dependency_on_sclk 3155 drivers/gpu/drm/radeon/si_dpm.c btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk, vddc_dependency_on_sclk 4158 drivers/gpu/drm/radeon/si_dpm.c if (rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries == NULL) vddc_dependency_on_sclk 4161 drivers/gpu/drm/radeon/si_dpm.c for (v_index = 0; (u32)v_index < rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count; v_index++) { vddc_dependency_on_sclk 4163 drivers/gpu/drm/radeon/si_dpm.c (u16)rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) { vddc_dependency_on_sclk 4176 drivers/gpu/drm/radeon/si_dpm.c for (v_index = 0; (u32)v_index < rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count; v_index++) { vddc_dependency_on_sclk 4178 drivers/gpu/drm/radeon/si_dpm.c (u16)rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) { vddc_dependency_on_sclk 5906 drivers/gpu/drm/radeon/si_dpm.c &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk);