vddc 1157 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c u16 *vddc, u16 *vddci, u16 *mvdd) vddc 1165 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c *vddc = 0; vddc 1174 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c *vddc = le16_to_cpu(firmware_info->info_14.usBootUpVDDCVoltage); vddc 1265 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c u16 *vddc, u16 *vddci, vddc 1276 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c *vddc = 0; vddc 1315 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c *vddc = vddc_buf[j * profile->ucElbVDDC_Num + i]; vddc 175 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h u16 *vddc, u16 *vddci, vddc 209 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h u16 *vddc, u16 *vddci, u16 *mvdd); vddc 386 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddc = vddc 461 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc = vddc 114 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h u16 vddc; vddc 135 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h u16 vddc; vddc 2043 drivers/gpu/drm/amd/amdgpu/kv_dpm.c table->vddc = vddc 2874 drivers/gpu/drm/amd/amdgpu/kv_dpm.c u16 vddc; vddc 2883 drivers/gpu/drm/amd/amdgpu/kv_dpm.c vddc = kv_convert_8bit_index_to_voltage(adev, (u16)tmp); vddc 2887 drivers/gpu/drm/amd/amdgpu/kv_dpm.c current_index, sclk, vddc); vddc 1866 drivers/gpu/drm/amd/amdgpu/si_dpm.c s64 kt, kv, leakage_w, i_leakage, vddc; vddc 1871 drivers/gpu/drm/amd/amdgpu/si_dpm.c vddc = div64_s64(drm_int2fixp(v), 1000); vddc 1880 drivers/gpu/drm/amd/amdgpu/si_dpm.c tmp = drm_fixp_mul(t_slope, vddc) + t_intercept; vddc 1883 drivers/gpu/drm/amd/amdgpu/si_dpm.c kv = drm_fixp_mul(av, drm_fixp_exp(drm_fixp_mul(bv, vddc))); vddc 1885 drivers/gpu/drm/amd/amdgpu/si_dpm.c leakage_w = drm_fixp_mul(drm_fixp_mul(drm_fixp_mul(i_leakage, kt), kv), vddc); vddc 1904 drivers/gpu/drm/amd/amdgpu/si_dpm.c s64 kt, kv, leakage_w, i_leakage, vddc; vddc 1907 drivers/gpu/drm/amd/amdgpu/si_dpm.c vddc = div64_s64(drm_int2fixp(v), 1000); vddc 1911 drivers/gpu/drm/amd/amdgpu/si_dpm.c drm_fixp_exp(drm_fixp_mul(div64_s64(drm_int2fixp(coeff->bv), 100000000), vddc))); vddc 1913 drivers/gpu/drm/amd/amdgpu/si_dpm.c leakage_w = drm_fixp_mul(drm_fixp_mul(drm_fixp_mul(i_leakage, kt), kv), vddc); vddc 2392 drivers/gpu/drm/amd/amdgpu/si_dpm.c SISLANDS_SMC_VOLTAGE_VALUE vddc; vddc 2448 drivers/gpu/drm/amd/amdgpu/si_dpm.c state->performance_levels[i-1].vddc, &vddc); vddc 2452 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_get_std_voltage_value(adev, &vddc, &prev_std_vddc); vddc 2457 drivers/gpu/drm/amd/amdgpu/si_dpm.c state->performance_levels[i].vddc, &vddc); vddc 2461 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_get_std_voltage_value(adev, &vddc, &curr_std_vddc); vddc 2648 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (table->entries[i].vddc > *max) vddc 2649 drivers/gpu/drm/amd/amdgpu/si_dpm.c *max = table->entries[i].vddc; vddc 2650 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (table->entries[i].vddc < *min) vddc 2651 drivers/gpu/drm/amd/amdgpu/si_dpm.c *min = table->entries[i].vddc; vddc 3316 drivers/gpu/drm/amd/amdgpu/si_dpm.c u16 *vddc, u16 *vddci) vddc 3321 drivers/gpu/drm/amd/amdgpu/si_dpm.c if ((0 == *vddc) || (0 == *vddci)) vddc 3324 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (*vddc > *vddci) { vddc 3325 drivers/gpu/drm/amd/amdgpu/si_dpm.c if ((*vddc - *vddci) > adev->pm.dpm.dyn_state.vddc_vddci_delta) { vddc 3327 drivers/gpu/drm/amd/amdgpu/si_dpm.c (*vddc - adev->pm.dpm.dyn_state.vddc_vddci_delta)); vddc 3331 drivers/gpu/drm/amd/amdgpu/si_dpm.c if ((*vddci - *vddc) > adev->pm.dpm.dyn_state.vddc_vddci_delta) { vddc 3334 drivers/gpu/drm/amd/amdgpu/si_dpm.c *vddc = (new_voltage < max_vddc) ? new_voltage : max_vddc; vddc 3402 drivers/gpu/drm/amd/amdgpu/si_dpm.c u16 vddc; vddc 3404 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (amdgpu_atombios_get_max_vddc(adev, 0, 0, &vddc)) vddc 3407 drivers/gpu/drm/amd/amdgpu/si_dpm.c pi->max_vddc = vddc; vddc 3435 drivers/gpu/drm/amd/amdgpu/si_dpm.c u16 vddc, vddci, min_vce_voltage = 0; vddc 3491 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (ps->performance_levels[i].vddc > ps->performance_levels[i+1].vddc) vddc 3492 drivers/gpu/drm/amd/amdgpu/si_dpm.c ps->performance_levels[i].vddc = ps->performance_levels[i+1].vddc; vddc 3500 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (ps->performance_levels[i].vddc > max_limits->vddc) vddc 3501 drivers/gpu/drm/amd/amdgpu/si_dpm.c ps->performance_levels[i].vddc = max_limits->vddc; vddc 3550 drivers/gpu/drm/amd/amdgpu/si_dpm.c vddc = ps->performance_levels[ps->performance_level_count - 1].vddc; vddc 3553 drivers/gpu/drm/amd/amdgpu/si_dpm.c vddc = ps->performance_levels[0].vddc; vddc 3566 drivers/gpu/drm/amd/amdgpu/si_dpm.c ps->performance_levels[0].vddc = vddc; vddc 3577 drivers/gpu/drm/amd/amdgpu/si_dpm.c ps->performance_levels[i].vddc = vddc; vddc 3583 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (ps->performance_levels[i].vddc < ps->performance_levels[i - 1].vddc) vddc 3584 drivers/gpu/drm/amd/amdgpu/si_dpm.c ps->performance_levels[i].vddc = ps->performance_levels[i - 1].vddc; vddc 3612 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (ps->performance_levels[i].vddc < min_vce_voltage) vddc 3613 drivers/gpu/drm/amd/amdgpu/si_dpm.c ps->performance_levels[i].vddc = min_vce_voltage; vddc 3616 drivers/gpu/drm/amd/amdgpu/si_dpm.c max_limits->vddc, &ps->performance_levels[i].vddc); vddc 3622 drivers/gpu/drm/amd/amdgpu/si_dpm.c max_limits->vddc, &ps->performance_levels[i].vddc); vddc 3625 drivers/gpu/drm/amd/amdgpu/si_dpm.c max_limits->vddc, &ps->performance_levels[i].vddc); vddc 3630 drivers/gpu/drm/amd/amdgpu/si_dpm.c max_limits->vddc, max_limits->vddci, vddc 3631 drivers/gpu/drm/amd/amdgpu/si_dpm.c &ps->performance_levels[i].vddc, vddc 3637 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (ps->performance_levels[i].vddc > adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddc) vddc 3695 drivers/gpu/drm/amd/amdgpu/si_dpm.c u16 vddc, count = 0; vddc 3699 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = amdgpu_atombios_get_leakage_vddc_based_on_leakage_idx(adev, &vddc, SISLANDS_LEAKAGE_INDEX0 + i); vddc 3701 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (!ret && (vddc > 0) && (vddc != (SISLANDS_LEAKAGE_INDEX0 + i))) { vddc 3702 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_pi->leakage_voltage.entries[count].voltage = vddc; vddc 4629 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.dyn_state.cac_leakage_table.entries[v_index].vddc; vddc 4632 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.dyn_state.cac_leakage_table.entries[adev->pm.dpm.dyn_state.cac_leakage_table.count-1].vddc; vddc 4644 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.dyn_state.cac_leakage_table.entries[v_index].vddc; vddc 4647 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.dyn_state.cac_leakage_table.entries[adev->pm.dpm.dyn_state.cac_leakage_table.count-1].vddc; vddc 4654 drivers/gpu/drm/amd/amdgpu/si_dpm.c *std_voltage = adev->pm.dpm.dyn_state.cac_leakage_table.entries[voltage->index].vddc; vddc 4885 drivers/gpu/drm/amd/amdgpu/si_dpm.c initial_state->performance_levels[0].vddc, vddc 4886 drivers/gpu/drm/amd/amdgpu/si_dpm.c &table->initialState.levels[0].vddc); vddc 4892 drivers/gpu/drm/amd/amdgpu/si_dpm.c &table->initialState.levels[0].vddc, vddc 4896 drivers/gpu/drm/amd/amdgpu/si_dpm.c table->initialState.levels[0].vddc.index, vddc 4909 drivers/gpu/drm/amd/amdgpu/si_dpm.c initial_state->performance_levels[0].vddc, vddc 4912 drivers/gpu/drm/amd/amdgpu/si_dpm.c &table->initialState.levels[0].vddc); vddc 4977 drivers/gpu/drm/amd/amdgpu/si_dpm.c pi->acpi_vddc, &table->ACPIState.levels[0].vddc); vddc 4982 drivers/gpu/drm/amd/amdgpu/si_dpm.c &table->ACPIState.levels[0].vddc, &std_vddc); vddc 4985 drivers/gpu/drm/amd/amdgpu/si_dpm.c table->ACPIState.levels[0].vddc.index, vddc 4996 drivers/gpu/drm/amd/amdgpu/si_dpm.c &table->ACPIState.levels[0].vddc); vddc 5000 drivers/gpu/drm/amd/amdgpu/si_dpm.c pi->min_vddc_in_table, &table->ACPIState.levels[0].vddc); vddc 5005 drivers/gpu/drm/amd/amdgpu/si_dpm.c &table->ACPIState.levels[0].vddc, &std_vddc); vddc 5009 drivers/gpu/drm/amd/amdgpu/si_dpm.c table->ACPIState.levels[0].vddc.index, vddc 5024 drivers/gpu/drm/amd/amdgpu/si_dpm.c &table->ACPIState.levels[0].vddc); vddc 5115 drivers/gpu/drm/amd/amdgpu/si_dpm.c state->levels[0].std_vddc = state->levels[0].vddc; vddc 5221 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (ulv->supported && ulv->pl.vddc) { vddc 5509 drivers/gpu/drm/amd/amdgpu/si_dpm.c pl->vddc, &level->vddc); vddc 5514 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_get_std_voltage_value(adev, &level->vddc, &std_vddc); vddc 5519 drivers/gpu/drm/amd/amdgpu/si_dpm.c level->vddc.index, &level->std_vddc); vddc 5533 drivers/gpu/drm/amd/amdgpu/si_dpm.c pl->vddc, vddc 5536 drivers/gpu/drm/amd/amdgpu/si_dpm.c &level->vddc); vddc 5625 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (ulv->pl.vddc < vddc 5760 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (ulv->supported && ulv->pl.vddc) { vddc 6127 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (ulv->supported && ulv->pl.vddc != 0) vddc 7151 drivers/gpu/drm/amd/amdgpu/si_dpm.c pl->vddc = le16_to_cpu(clock_info->si.usVDDC); vddc 7160 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_get_leakage_voltage_from_leakage_index(adev, pl->vddc, vddc 7163 drivers/gpu/drm/amd/amdgpu/si_dpm.c pl->vddc = leakage_voltage; vddc 7166 drivers/gpu/drm/amd/amdgpu/si_dpm.c pi->acpi_vddc = pl->vddc; vddc 7182 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (pi->min_vddc_in_table > pl->vddc) vddc 7183 drivers/gpu/drm/amd/amdgpu/si_dpm.c pi->min_vddc_in_table = pl->vddc; vddc 7185 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (pi->max_vddc_in_table < pl->vddc) vddc 7186 drivers/gpu/drm/amd/amdgpu/si_dpm.c pi->max_vddc_in_table = pl->vddc; vddc 7190 drivers/gpu/drm/amd/amdgpu/si_dpm.c u16 vddc, vddci, mvdd; vddc 7191 drivers/gpu/drm/amd/amdgpu/si_dpm.c amdgpu_atombios_get_default_voltages(adev, &vddc, &vddci, &mvdd); vddc 7194 drivers/gpu/drm/amd/amdgpu/si_dpm.c pl->vddc = vddc; vddc 7203 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddc = pl->vddc; vddc 7500 drivers/gpu/drm/amd/amdgpu/si_dpm.c current_index, pl->sclk, pl->mclk, pl->vddc, pl->vddci, pl->pcie_gen + 1); vddc 7910 drivers/gpu/drm/amd/amdgpu/si_dpm.c i, pl->sclk, pl->mclk, pl->vddc, pl->vddci, pl->pcie_gen + 1); vddc 7913 drivers/gpu/drm/amd/amdgpu/si_dpm.c i, pl->sclk, pl->mclk, pl->vddc, pl->vddci); vddc 7935 drivers/gpu/drm/amd/amdgpu/si_dpm.c (si_cpl1->vddc == si_cpl2->vddc) && vddc 441 drivers/gpu/drm/amd/amdgpu/si_dpm.h RV770_SMC_VOLTAGE_VALUE vddc; vddc 489 drivers/gpu/drm/amd/amdgpu/si_dpm.h u16 vddc; vddc 601 drivers/gpu/drm/amd/amdgpu/si_dpm.h u16 vddc; vddc 761 drivers/gpu/drm/amd/amdgpu/si_dpm.h NISLANDS_SMC_VOLTAGE_VALUE vddc; vddc 155 drivers/gpu/drm/amd/amdgpu/sislands_smc.h SISLANDS_SMC_VOLTAGE_VALUE vddc; vddc 37 drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr_ppt.h uint16_t vddc; vddc 66 drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr_ppt.h uint16_t vddc; vddc 1473 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c uint16_t *vddc, uint16_t *vddci, vddc 1482 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c *vddc = 0; vddc 1505 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c *vddc = vddc_buf[j * profile->ucElbVDDC_Num + i]; vddc 329 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h uint16_t *vddc, uint16_t *vddci, vddc 360 drivers/gpu/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c limits->vddc = le16_to_cpu(limitable->entries[0].usVddcLimit); vddc 828 drivers/gpu/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c hwmgr->dyn_state.max_clock_voltage_on_dc.vddc = vddc 829 drivers/gpu/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c pp_table_information->max_clock_voltage_on_dc.vddc; vddc 436 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c limits->vddc = (unsigned long)le16_to_cpu(table->entries[0].usVddc); vddc 843 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c entries[i].vddc = dep_sclk_table->entries[i].vddc; vddc 855 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c entries[i].vddc = dep_mclk_table->entries[i].vddc; vddc 881 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c || min_vddc > dep_sclk_table->entries[0].vddc) vddc 882 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c min_vddc = dep_sclk_table->entries[0].vddc; vddc 885 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c || max_vddc < dep_sclk_table->entries[dep_sclk_table->count-1].vddc) vddc 886 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c max_vddc = dep_sclk_table->entries[dep_sclk_table->count-1].vddc; vddc 926 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c if (dep_table->entries[i].vddc != odn_dep_table->entries[i].vddc) { vddc 935 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c if (dep_table->entries[i].vddc != odn_dep_table->entries[i].vddc) { vddc 1697 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c uint16_t vddc = 0; vddc 1762 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c sclk, vv_id, &vddc) == 0) { vddc 1763 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c if (vddc >= 2000 || vddc == 0) vddc 1771 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c if (vddc != 0 && vddc != vv_id) { vddc 1772 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c data->vddc_leakage.actual_voltage[data->vddc_leakage.count] = (uint16_t)(vddc); vddc 1832 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c uint16_t *vddc) vddc 1836 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c smu7_patch_ppt_v1_with_vdd_leakage(hwmgr, (uint16_t *)vddc, leakage_table); vddc 1837 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c hwmgr->dyn_state.max_clock_voltage_on_dc.vddc = vddc 1838 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c table_info->max_clock_voltage_on_dc.vddc; vddc 1867 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c sclk_table->entries[entry_id].vddc = vddc 1874 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c mclk_table->entries[entry_id].vddc = vddc 1880 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c mm_table->entries[entry_id].vddc = vddc 1944 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c sclk_table->entries[entry_id].vddc = vddc 1953 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c v_record.us_vdd = mclk_table->entries[entry_id].vddc + vddc 1956 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c v_record.us_vdd = mclk_table->entries[entry_id].vddc + vddc 1978 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c v_record.us_vdd = mm_table->entries[entry_id].vddc + vddc 1981 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c v_record.us_vdd = mm_table->entries[entry_id].vddc + vddc 2042 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c &(data->vddc_leakage), &table_info->max_clock_voltage_on_dc.vddc); vddc 2098 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c table_info->max_clock_voltage_on_ac.vddc = vddc 2099 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c allowed_sclk_vdd_table->entries[allowed_sclk_vdd_table->count - 1].vddc; vddc 2105 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c hwmgr->dyn_state.max_clock_voltage_on_ac.vddc = table_info->max_clock_voltage_on_ac.vddc; vddc 2364 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c uint32_t vddc, vddci; vddc 2368 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c vddc = tab->vddc; vddc 2369 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c smu7_patch_ppt_v0_with_vdd_leakage(hwmgr, &vddc, vddc 2371 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c tab->vddc = vddc; vddc 2384 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c uint32_t vddc; vddc 2389 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c vddc = (uint32_t)(tab->entries[i].Vddc); vddc 2390 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c smu7_patch_ppt_v0_with_vdd_leakage(hwmgr, &vddc, &data->vddc_leakage); vddc 2391 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c tab->entries[i].Vddc = (uint16_t)vddc; vddc 2483 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c hwmgr->dyn_state.max_clock_voltage_on_ac.vddc = vddc 2509 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c uint16_t virtual_voltage_id, vddc, vddci, efuse_voltage_id; vddc 2516 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c if (atomctrl_get_leakage_vddc_base_on_leakage(hwmgr, &vddc, &vddci, vddc 2519 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c if (vddc != 0 && vddc != virtual_voltage_id) { vddc 2520 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c data->vddc_leakage.actual_voltage[data->vddc_leakage.count] = vddc; vddc 4509 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c odn_sclk_table->entries[i].vddc); vddc 4518 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c odn_mclk_table->entries[i].vddc); vddc 4904 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c podn_dpm_table_in_backend->entries[input_level].vddc = input_vol; vddc 4905 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c podn_vdd_dep_in_backend->entries[input_level].vddc = input_vol; vddc 264 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c table->vddc = smu8_convert_8Bit_index_to_voltage(hwmgr, vddc 1485 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c if (limits->vddc >= table->entries[i].v) { vddc 1583 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c level->vddc = (smu8_convert_8Bit_index_to_voltage(hwmgr, ps->levels[level_index].vddcIndex) + 2) / 4; vddc 35 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c uint8_t convert_to_vid(uint16_t vddc) vddc 37 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c return (uint8_t) ((6200 - (vddc * VOLTAGE_SCALE)) / 25); vddc 557 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c if (req_vddc <= vddc_table->entries[i].vddc) { vddc 558 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c req_volt = (((uint32_t)vddc_table->entries[i].vddc) * VOLTAGE_SCALE); vddc 692 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c dep_table->entries[i].vddc = allowed_dep_table->entries[i].vddc; vddc 32 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.h uint8_t convert_to_vid(uint16_t vddc); vddc 340 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c odn_table->max_vddc = dep_table[0]->entries[dep_table[0]->count - 1].vddc; vddc 342 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c odn_table->min_vddc = dep_table[0]->entries[0].vddc; vddc 348 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c od_table[2]->entries[i].vddc = odn_table->max_vddc > od_table[2]->entries[i].vddc ? vddc 350 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c od_table[2]->entries[i].vddc; vddc 555 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c uint32_t vddc = 0; vddc 580 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c VOLTAGE_TYPE_VDDC, sclk, vv_id, &vddc), vddc 586 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c PP_ASSERT_WITH_CODE((vddc < 2000 && vddc != 0), vddc 590 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c if (vddc != 0 && vddc != vv_id) { vddc 591 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c data->vddc_leakage.actual_voltage[data->vddc_leakage.count] = (uint16_t)(vddc/100); vddc 650 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c uint16_t *vddc) vddc 652 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c vega10_patch_with_vdd_leakage(hwmgr, (uint16_t *)vddc, leakage_table); vddc 683 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c vdt->entries[entry_id].vddc = vddc 690 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c mm_table->entries[entry_id].vddc = vddc 696 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c mclk_table->entries[entry_id].vddc = vddc 752 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c &(data->vddc_leakage), &table_info->max_clock_voltage_on_dc.vddc); vddc 791 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->max_clock_voltage_on_ac.vddc = vddc 792 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c allowed_sclk_vdd_table->entries[allowed_sclk_vdd_table->count - 1].vddc; vddc 800 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c hwmgr->dyn_state.max_clock_voltage_on_ac.vddc = vddc 801 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->max_clock_voltage_on_ac.vddc; vddc 1117 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c vol_table->entries[i].value = dep_table->entries[i].vddc; vddc 1862 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c uint16_t clk = 0, vddc = 0; vddc 1888 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c vddc = table_info->vddc_lookup_table-> vddc 1890 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c vid = (uint8_t)convert_to_vid(vddc); vddc 2469 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c if (dep_table->entries[i].vddc != odn_dep_table->entries[i].vddc) { vddc 2478 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c if (dep_table->entries[i].vddc != odn_dep_table->entries[i].vddc) { vddc 2590 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c data->vbios_boot_state.vddc = boot_up_values.usVddc; vddc 4549 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c podn_vdd_dep->entries[i].vddc); vddc 4559 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c podn_vdd_dep->entries[i].vddc); vddc 5102 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c od_vddc_lookup_table->entries[i].us_vdd = podn_vdd_dep->entries[i].vddc; vddc 5108 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c podn_vdd_dep->entries[i].vddc) vddc 5114 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c podn_vdd_dep->entries[i].vddc; vddc 5132 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c podn_vdd_dep_on_socclk->entries[i].vddc = dep_table->entries[i].vddc; vddc 5212 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c podn_vdd_dep_table->entries[input_level].vddc = input_vol; vddc 183 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h uint16_t vddc; vddc 866 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c limits->vddc = le16_to_cpu(limit_table->entries[0].usVddcLimit); vddc 1027 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c hwmgr->dyn_state.max_clock_voltage_on_dc.vddc = vddc 1028 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c pp_table_info->max_clock_voltage_on_dc.vddc; vddc 741 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c data->vbios_boot_state.vddc = boot_up_values.usVddc; vddc 162 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h uint16_t vddc; vddc 797 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c data->vbios_boot_state.vddc = boot_up_values.usVddc; vddc 214 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h uint16_t vddc; vddc 194 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h uint32_t vddc; vddc 219 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h uint16_t vddc; vddc 274 drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h uint32_t vddc; vddc 386 drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h uint32_t vddc; vddc 514 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h uint16_t vddc; vddc 550 drivers/gpu/drm/amd/powerplay/smu_v11_0.c smu->smu_table.boot_values.vddc = v_3_1->bootup_vddc_mv; vddc 565 drivers/gpu/drm/amd/powerplay/smu_v11_0.c smu->smu_table.boot_values.vddc = v_3_3->bootup_vddc_mv; vddc 2864 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c uint32_t max_vddc = adev->pm.ac_power ? hwmgr->dyn_state.max_clock_voltage_on_ac.vddc : vddc 2865 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c hwmgr->dyn_state.max_clock_voltage_on_dc.vddc; vddc 2900 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c uint32_t max_vddc = adev->pm.ac_power ? hwmgr->dyn_state.max_clock_voltage_on_ac.vddc : vddc 2901 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c hwmgr->dyn_state.max_clock_voltage_on_dc.vddc; vddc 371 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c *voltage |= (dep_table->entries[i].vddc * vddc 381 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c (dep_table->entries[i].vddc - vddc 399 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c *voltage |= (dep_table->entries[i - 1].vddc * VOLTAGE_SCALE) << VDDC_SHIFT; vddc 406 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c (dep_table->entries[i].vddc - vddc 1440 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c (mm_table->entries[count].vddc * VOLTAGE_SCALE) << VDDC_SHIFT; vddc 1442 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c ((mm_table->entries[count].vddc - VDDC_VDDCI_DELTA) * vddc 1477 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c table->AcpLevel[count].MinVoltage |= (mm_table->entries[count].vddc * vddc 1479 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c table->AcpLevel[count].MinVoltage |= ((mm_table->entries[count].vddc - vddc 1576 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c table->UvdLevel[count].MinVoltage |= (mm_table->entries[count].vddc * vddc 1578 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c table->UvdLevel[count].MinVoltage |= ((mm_table->entries[count].vddc - vddc 369 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c *voltage |= (dep_table->entries[i].vddc * vddc 379 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c (dep_table->entries[i].vddc - vddc 397 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c *voltage |= (dep_table->entries[i - 1].vddc * VOLTAGE_SCALE) << VDDC_SHIFT; vddc 404 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c (dep_table->entries[i].vddc - vddc 1306 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c (mm_table->entries[count].vddc * VOLTAGE_SCALE) << VDDC_SHIFT; vddc 1310 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c mm_table->entries[count].vddc - VDDC_VDDCI_DELTA); vddc 1312 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c vddci = mm_table->entries[count].vddc - VDDC_VDDCI_DELTA; vddc 1412 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c table->UvdLevel[count].MinVoltage |= (mm_table->entries[count].vddc * vddc 1417 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c mm_table->entries[count].vddc - VDDC_VDDCI_DELTA); vddc 1419 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c vddci = mm_table->entries[count].vddc - VDDC_VDDCI_DELTA; vddc 267 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c allowed_clock_voltage_table->entries[i].vddc); vddc 275 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c allowed_clock_voltage_table->entries[i].vddc - VDDC_VDDCI_DELTA); vddc 290 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c allowed_clock_voltage_table->entries[i-1].vddc); vddc 1328 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c mm_table->entries[count].vddc); vddc 1335 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c mm_table->entries[count].vddc - VDDC_VDDCI_DELTA); vddc 1388 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c mm_table->entries[count].vddc); vddc 1395 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c mm_table->entries[count].vddc - VDDC_VDDCI_DELTA); vddc 1433 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c mm_table->entries[count].vddc); vddc 1440 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c mm_table->entries[count].vddc - VDDC_VDDCI_DELTA); vddc 616 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c *voltage |= (dep_table->entries[i].vddc * vddc 626 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c (dep_table->entries[i].vddc - vddc 644 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c *voltage |= (dep_table->entries[i - 1].vddc * VOLTAGE_SCALE) << VDDC_SHIFT; vddc 646 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c (dep_table->entries[i - 1].vddc - vddc 1223 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c (mm_table->entries[count].vddc * VOLTAGE_SCALE) << VDDC_SHIFT; vddc 1227 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c mm_table->entries[count].vddc - VDDC_VDDCI_DELTA); vddc 1229 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c vddci = mm_table->entries[count].vddc - VDDC_VDDCI_DELTA; vddc 1337 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c (mm_table->entries[count].vddc * VOLTAGE_SCALE) << VDDC_SHIFT; vddc 1341 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c mm_table->entries[count].vddc - VDDC_VDDCI_DELTA); vddc 1343 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c vddci = mm_table->entries[count].vddc - VDDC_VDDCI_DELTA; vddc 1311 drivers/gpu/drm/radeon/btc_dpm.c u16 *vddc, u16 *vddci) vddc 1316 drivers/gpu/drm/radeon/btc_dpm.c if ((0 == *vddc) || (0 == *vddci)) vddc 1319 drivers/gpu/drm/radeon/btc_dpm.c if (*vddc > *vddci) { vddc 1320 drivers/gpu/drm/radeon/btc_dpm.c if ((*vddc - *vddci) > rdev->pm.dpm.dyn_state.vddc_vddci_delta) { vddc 1322 drivers/gpu/drm/radeon/btc_dpm.c (*vddc - rdev->pm.dpm.dyn_state.vddc_vddci_delta)); vddc 1326 drivers/gpu/drm/radeon/btc_dpm.c if ((*vddci - *vddc) > rdev->pm.dpm.dyn_state.vddc_vddci_delta) { vddc 1329 drivers/gpu/drm/radeon/btc_dpm.c *vddc = (new_voltage < max_vddc) ? new_voltage : max_vddc; vddc 1405 drivers/gpu/drm/radeon/btc_dpm.c if (ulv_pl->vddc) { vddc 2103 drivers/gpu/drm/radeon/btc_dpm.c u16 vddc, vddci; vddc 2121 drivers/gpu/drm/radeon/btc_dpm.c if (ps->high.vddc > max_limits->vddc) vddc 2122 drivers/gpu/drm/radeon/btc_dpm.c ps->high.vddc = max_limits->vddc; vddc 2130 drivers/gpu/drm/radeon/btc_dpm.c if (ps->medium.vddc > max_limits->vddc) vddc 2131 drivers/gpu/drm/radeon/btc_dpm.c ps->medium.vddc = max_limits->vddc; vddc 2139 drivers/gpu/drm/radeon/btc_dpm.c if (ps->low.vddc > max_limits->vddc) vddc 2140 drivers/gpu/drm/radeon/btc_dpm.c ps->low.vddc = max_limits->vddc; vddc 2150 drivers/gpu/drm/radeon/btc_dpm.c vddc = ps->low.vddc; vddc 2155 drivers/gpu/drm/radeon/btc_dpm.c vddc = ps->low.vddc; vddc 2162 drivers/gpu/drm/radeon/btc_dpm.c ps->low.vddc = vddc; vddc 2171 drivers/gpu/drm/radeon/btc_dpm.c if (ps->medium.vddc < ps->low.vddc) vddc 2172 drivers/gpu/drm/radeon/btc_dpm.c ps->medium.vddc = ps->low.vddc; vddc 2175 drivers/gpu/drm/radeon/btc_dpm.c if (ps->high.vddc < ps->medium.vddc) vddc 2176 drivers/gpu/drm/radeon/btc_dpm.c ps->high.vddc = ps->medium.vddc; vddc 2211 drivers/gpu/drm/radeon/btc_dpm.c ps->low.sclk, max_limits->vddc, &ps->low.vddc); vddc 2215 drivers/gpu/drm/radeon/btc_dpm.c ps->low.mclk, max_limits->vddc, &ps->low.vddc); vddc 2217 drivers/gpu/drm/radeon/btc_dpm.c rdev->clock.current_dispclk, max_limits->vddc, &ps->low.vddc); vddc 2220 drivers/gpu/drm/radeon/btc_dpm.c ps->medium.sclk, max_limits->vddc, &ps->medium.vddc); vddc 2224 drivers/gpu/drm/radeon/btc_dpm.c ps->medium.mclk, max_limits->vddc, &ps->medium.vddc); vddc 2226 drivers/gpu/drm/radeon/btc_dpm.c rdev->clock.current_dispclk, max_limits->vddc, &ps->medium.vddc); vddc 2229 drivers/gpu/drm/radeon/btc_dpm.c ps->high.sclk, max_limits->vddc, &ps->high.vddc); vddc 2233 drivers/gpu/drm/radeon/btc_dpm.c ps->high.mclk, max_limits->vddc, &ps->high.vddc); vddc 2235 drivers/gpu/drm/radeon/btc_dpm.c rdev->clock.current_dispclk, max_limits->vddc, &ps->high.vddc); vddc 2237 drivers/gpu/drm/radeon/btc_dpm.c btc_apply_voltage_delta_rules(rdev, max_limits->vddc, max_limits->vddci, vddc 2238 drivers/gpu/drm/radeon/btc_dpm.c &ps->low.vddc, &ps->low.vddci); vddc 2239 drivers/gpu/drm/radeon/btc_dpm.c btc_apply_voltage_delta_rules(rdev, max_limits->vddc, max_limits->vddci, vddc 2240 drivers/gpu/drm/radeon/btc_dpm.c &ps->medium.vddc, &ps->medium.vddci); vddc 2241 drivers/gpu/drm/radeon/btc_dpm.c btc_apply_voltage_delta_rules(rdev, max_limits->vddc, max_limits->vddci, vddc 2242 drivers/gpu/drm/radeon/btc_dpm.c &ps->high.vddc, &ps->high.vddci); vddc 2244 drivers/gpu/drm/radeon/btc_dpm.c if ((ps->high.vddc <= rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddc) && vddc 2245 drivers/gpu/drm/radeon/btc_dpm.c (ps->medium.vddc <= rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddc) && vddc 2246 drivers/gpu/drm/radeon/btc_dpm.c (ps->low.vddc <= rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddc)) vddc 2251 drivers/gpu/drm/radeon/btc_dpm.c if (ps->low.vddc < rdev->pm.dpm.dyn_state.min_vddc_for_pcie_gen2) vddc 2253 drivers/gpu/drm/radeon/btc_dpm.c if (ps->medium.vddc < rdev->pm.dpm.dyn_state.min_vddc_for_pcie_gen2) vddc 2255 drivers/gpu/drm/radeon/btc_dpm.c if (ps->high.vddc < rdev->pm.dpm.dyn_state.min_vddc_for_pcie_gen2) vddc 2758 drivers/gpu/drm/radeon/btc_dpm.c current_index, pl->sclk, pl->mclk, pl->vddc, pl->vddci); vddc 56 drivers/gpu/drm/radeon/btc_dpm.h u16 *vddc, u16 *vddci); vddc 270 drivers/gpu/drm/radeon/ci_dpm.c static u8 ci_convert_to_vid(u16 vddc) vddc 272 drivers/gpu/drm/radeon/ci_dpm.c return (6200 - (vddc * VOLTAGE_SCALE)) / 25; vddc 297 drivers/gpu/drm/radeon/ci_dpm.c lo_vid[i] = ci_convert_to_vid(rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc); vddc 1342 drivers/gpu/drm/radeon/ci_dpm.c u16 vddc, vddci; vddc 1351 drivers/gpu/drm/radeon/ci_dpm.c if (radeon_atom_get_voltage_evv(rdev, virtual_voltage_id, &vddc) != 0) vddc 1353 drivers/gpu/drm/radeon/ci_dpm.c if (vddc != 0 && vddc != virtual_voltage_id) { vddc 1354 drivers/gpu/drm/radeon/ci_dpm.c pi->vddc_leakage.actual_voltage[pi->vddc_leakage.count] = vddc; vddc 1362 drivers/gpu/drm/radeon/ci_dpm.c if (radeon_atom_get_leakage_vddc_based_on_leakage_params(rdev, &vddc, &vddci, vddc 1365 drivers/gpu/drm/radeon/ci_dpm.c if (vddc != 0 && vddc != virtual_voltage_id) { vddc 1366 drivers/gpu/drm/radeon/ci_dpm.c pi->vddc_leakage.actual_voltage[pi->vddc_leakage.count] = vddc; vddc 2350 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.cac_leakage_table.entries[idx].vddc * VOLTAGE_SCALE; vddc 2367 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.cac_leakage_table.entries[idx].vddc * VOLTAGE_SCALE; vddc 3946 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].v <= max_limits->vddc) { vddc 3994 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].v <= max_limits->vddc) { vddc 4027 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries[i].v <= max_limits->vddc) { vddc 4058 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries[i].v <= max_limits->vddc) { vddc 4952 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddc = vddc 4960 drivers/gpu/drm/radeon/ci_dpm.c static void ci_patch_with_vddc_leakage(struct radeon_device *rdev, u16 *vddc) vddc 4967 drivers/gpu/drm/radeon/ci_dpm.c if (leakage_table->leakage_id[leakage_index] == *vddc) { vddc 4968 drivers/gpu/drm/radeon/ci_dpm.c *vddc = leakage_table->actual_voltage[leakage_index]; vddc 5047 drivers/gpu/drm/radeon/ci_dpm.c ci_patch_with_vddc_leakage(rdev, (u16 *)&table->vddc); vddc 5059 drivers/gpu/drm/radeon/ci_dpm.c ci_patch_with_vddc_leakage(rdev, &table->entries[i].vddc); vddc 744 drivers/gpu/drm/radeon/cypress_dpm.c pl->vddc, vddc 745 drivers/gpu/drm/radeon/cypress_dpm.c &level->vddc); vddc 1285 drivers/gpu/drm/radeon/cypress_dpm.c initial_state->low.vddc, vddc 1286 drivers/gpu/drm/radeon/cypress_dpm.c &table->initialState.levels[0].vddc); vddc 1363 drivers/gpu/drm/radeon/cypress_dpm.c &table->ACPIState.levels[0].vddc); vddc 1379 drivers/gpu/drm/radeon/cypress_dpm.c &table->ACPIState.levels[0].vddc); vddc 1977 drivers/gpu/drm/radeon/kv_dpm.c table->vddc = vddc 2810 drivers/gpu/drm/radeon/kv_dpm.c u16 vddc; vddc 2818 drivers/gpu/drm/radeon/kv_dpm.c vddc = kv_convert_8bit_index_to_voltage(rdev, (u16)tmp); vddc 2822 drivers/gpu/drm/radeon/kv_dpm.c current_index, sclk, vddc); vddc 747 drivers/gpu/drm/radeon/ni_dpm.c s64 kt, kv, leakage_w, i_leakage, vddc, temperature; vddc 750 drivers/gpu/drm/radeon/ni_dpm.c vddc = div64_s64(drm_int2fixp(v), 1000); vddc 756 drivers/gpu/drm/radeon/ni_dpm.c drm_fixp_exp(drm_fixp_mul(div64_s64(drm_int2fixp(coeff->bv), 1000), vddc))); vddc 758 drivers/gpu/drm/radeon/ni_dpm.c leakage_w = drm_fixp_mul(drm_fixp_mul(drm_fixp_mul(i_leakage, kt), kv), vddc); vddc 814 drivers/gpu/drm/radeon/ni_dpm.c if (ps->performance_levels[i].vddc > max_limits->vddc) vddc 815 drivers/gpu/drm/radeon/ni_dpm.c ps->performance_levels[i].vddc = max_limits->vddc; vddc 838 drivers/gpu/drm/radeon/ni_dpm.c if (ps->performance_levels[i].vddc < ps->performance_levels[i - 1].vddc) vddc 839 drivers/gpu/drm/radeon/ni_dpm.c ps->performance_levels[i].vddc = ps->performance_levels[i - 1].vddc; vddc 877 drivers/gpu/drm/radeon/ni_dpm.c max_limits->vddc, &ps->performance_levels[i].vddc); vddc 883 drivers/gpu/drm/radeon/ni_dpm.c max_limits->vddc, &ps->performance_levels[i].vddc); vddc 886 drivers/gpu/drm/radeon/ni_dpm.c max_limits->vddc, &ps->performance_levels[i].vddc); vddc 891 drivers/gpu/drm/radeon/ni_dpm.c max_limits->vddc, max_limits->vddci, vddc 892 drivers/gpu/drm/radeon/ni_dpm.c &ps->performance_levels[i].vddc, vddc 898 drivers/gpu/drm/radeon/ni_dpm.c if (ps->performance_levels[i].vddc > rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddc) vddc 901 drivers/gpu/drm/radeon/ni_dpm.c if (ps->performance_levels[i].vddc < rdev->pm.dpm.dyn_state.min_vddc_for_pcie_gen2) vddc 1350 drivers/gpu/drm/radeon/ni_dpm.c *std_voltage = rdev->pm.dpm.dyn_state.cac_leakage_table.entries[voltage->index].vddc; vddc 1394 drivers/gpu/drm/radeon/ni_dpm.c NISLANDS_SMC_VOLTAGE_VALUE vddc; vddc 1403 drivers/gpu/drm/radeon/ni_dpm.c state->performance_levels[state->performance_level_count - 2].vddc, vddc 1404 drivers/gpu/drm/radeon/ni_dpm.c &vddc); vddc 1408 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_get_std_voltage_value(rdev, &vddc, &std_vddc_med); vddc 1413 drivers/gpu/drm/radeon/ni_dpm.c state->performance_levels[state->performance_level_count - 1].vddc, vddc 1414 drivers/gpu/drm/radeon/ni_dpm.c &vddc); vddc 1418 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_get_std_voltage_value(rdev, &vddc, &std_vddc_high); vddc 1731 drivers/gpu/drm/radeon/ni_dpm.c initial_state->performance_levels[0].vddc, vddc 1732 drivers/gpu/drm/radeon/ni_dpm.c &table->initialState.levels[0].vddc); vddc 1737 drivers/gpu/drm/radeon/ni_dpm.c &table->initialState.levels[0].vddc, vddc 1741 drivers/gpu/drm/radeon/ni_dpm.c table->initialState.levels[0].vddc.index, vddc 1818 drivers/gpu/drm/radeon/ni_dpm.c pi->acpi_vddc, &table->ACPIState.levels[0].vddc); vddc 1823 drivers/gpu/drm/radeon/ni_dpm.c &table->ACPIState.levels[0].vddc, &std_vddc); vddc 1826 drivers/gpu/drm/radeon/ni_dpm.c table->ACPIState.levels[0].vddc.index, vddc 1842 drivers/gpu/drm/radeon/ni_dpm.c &table->ACPIState.levels[0].vddc); vddc 1847 drivers/gpu/drm/radeon/ni_dpm.c &table->ACPIState.levels[0].vddc, vddc 1851 drivers/gpu/drm/radeon/ni_dpm.c table->ACPIState.levels[0].vddc.index, vddc 2367 drivers/gpu/drm/radeon/ni_dpm.c pl->vddc, &level->vddc); vddc 2371 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_get_std_voltage_value(rdev, &level->vddc, &std_vddc); vddc 2376 drivers/gpu/drm/radeon/ni_dpm.c level->vddc.index, &level->std_vddc); vddc 3936 drivers/gpu/drm/radeon/ni_dpm.c pl->vddc = le16_to_cpu(clock_info->evergreen.usVDDC); vddc 3941 drivers/gpu/drm/radeon/ni_dpm.c if (pl->vddc == 0xff01) { vddc 3943 drivers/gpu/drm/radeon/ni_dpm.c pl->vddc = pi->max_vddc; vddc 3947 drivers/gpu/drm/radeon/ni_dpm.c pi->acpi_vddc = pl->vddc; vddc 3960 drivers/gpu/drm/radeon/ni_dpm.c if (pi->min_vddc_in_table > pl->vddc) vddc 3961 drivers/gpu/drm/radeon/ni_dpm.c pi->min_vddc_in_table = pl->vddc; vddc 3963 drivers/gpu/drm/radeon/ni_dpm.c if (pi->max_vddc_in_table < pl->vddc) vddc 3964 drivers/gpu/drm/radeon/ni_dpm.c pi->max_vddc_in_table = pl->vddc; vddc 3968 drivers/gpu/drm/radeon/ni_dpm.c u16 vddc, vddci, mvdd; vddc 3969 drivers/gpu/drm/radeon/ni_dpm.c radeon_atombios_get_default_voltages(rdev, &vddc, &vddci, &mvdd); vddc 3972 drivers/gpu/drm/radeon/ni_dpm.c pl->vddc = vddc; vddc 3980 drivers/gpu/drm/radeon/ni_dpm.c rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddc = pl->vddc; vddc 4296 drivers/gpu/drm/radeon/ni_dpm.c i, pl->sclk, pl->mclk, pl->vddc, pl->vddci, pl->pcie_gen + 1); vddc 4299 drivers/gpu/drm/radeon/ni_dpm.c i, pl->sclk, pl->mclk, pl->vddc, pl->vddci); vddc 4321 drivers/gpu/drm/radeon/ni_dpm.c current_index, pl->sclk, pl->mclk, pl->vddc, pl->vddci); vddc 110 drivers/gpu/drm/radeon/nislands_smc.h NISLANDS_SMC_VOLTAGE_VALUE vddc; vddc 979 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddc = vddc 1054 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc = vddc 315 drivers/gpu/drm/radeon/radeon.h u16 *vddc, u16 *vddci, vddc 1376 drivers/gpu/drm/radeon/radeon.h u16 vddc; vddc 1397 drivers/gpu/drm/radeon/radeon.h u16 vddc; vddc 2377 drivers/gpu/drm/radeon/radeon_atombios.c u16 *vddc, u16 *vddci, u16 *mvdd) vddc 2385 drivers/gpu/drm/radeon/radeon_atombios.c *vddc = 0; vddc 2394 drivers/gpu/drm/radeon/radeon_atombios.c *vddc = le16_to_cpu(firmware_info->info_14.usBootUpVDDCVoltage); vddc 2409 drivers/gpu/drm/radeon/radeon_atombios.c u16 vddc, vddci, mvdd; vddc 2411 drivers/gpu/drm/radeon/radeon_atombios.c radeon_atombios_get_default_voltages(rdev, &vddc, &vddci, &mvdd); vddc 2466 drivers/gpu/drm/radeon/radeon_atombios.c if (vddc) vddc 2468 drivers/gpu/drm/radeon/radeon_atombios.c vddc; vddc 2482 drivers/gpu/drm/radeon/radeon_atombios.c u16 vddc; vddc 2554 drivers/gpu/drm/radeon/radeon_atombios.c &vddc) == 0) vddc 2555 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[mode_index].voltage.voltage = vddc; vddc 3220 drivers/gpu/drm/radeon/radeon_atombios.c u16 *vddc, u16 *vddci, vddc 3231 drivers/gpu/drm/radeon/radeon_atombios.c *vddc = 0; vddc 3270 drivers/gpu/drm/radeon/radeon_atombios.c *vddc = vddc_buf[j * profile->ucElbVDDC_Num + i]; vddc 722 drivers/gpu/drm/radeon/radeon_mode.h u16 *vddc, u16 *vddci, u16 *mvdd); vddc 512 drivers/gpu/drm/radeon/rs780_dpm.c enum rs780_vddc_level vddc) vddc 516 drivers/gpu/drm/radeon/rs780_dpm.c if (vddc == RS780_VDDC_LEVEL_HIGH) vddc 518 drivers/gpu/drm/radeon/rs780_dpm.c else if (vddc == RS780_VDDC_LEVEL_LOW) vddc 485 drivers/gpu/drm/radeon/rv6xx_dpm.c pi->hw.vddc[R600_POWER_LEVEL_CTXSW] = state->high.vddc; vddc 486 drivers/gpu/drm/radeon/rv6xx_dpm.c pi->hw.vddc[R600_POWER_LEVEL_HIGH] = state->high.vddc; vddc 487 drivers/gpu/drm/radeon/rv6xx_dpm.c pi->hw.vddc[R600_POWER_LEVEL_MEDIUM] = state->medium.vddc; vddc 488 drivers/gpu/drm/radeon/rv6xx_dpm.c pi->hw.vddc[R600_POWER_LEVEL_LOW] = state->low.vddc; vddc 508 drivers/gpu/drm/radeon/rv6xx_dpm.c if ((state->high.vddc == state->medium.vddc) && vddc 516 drivers/gpu/drm/radeon/rv6xx_dpm.c if ((state->medium.vddc == state->low.vddc) && vddc 725 drivers/gpu/drm/radeon/rv6xx_dpm.c pi->hw.vddc[i]); vddc 767 drivers/gpu/drm/radeon/rv6xx_dpm.c pi->hw.vddc[0]); vddc 948 drivers/gpu/drm/radeon/rv6xx_dpm.c pi->hw.vddc[i], vddc 973 drivers/gpu/drm/radeon/rv6xx_dpm.c new_state->low.vddc, vddc 1206 drivers/gpu/drm/radeon/rv6xx_dpm.c safe_voltage = (new_state->low.vddc >= old_state->low.vddc) ? vddc 1207 drivers/gpu/drm/radeon/rv6xx_dpm.c new_state->low.vddc : old_state->low.vddc; vddc 1222 drivers/gpu/drm/radeon/rv6xx_dpm.c old_state->low.vddc); vddc 1311 drivers/gpu/drm/radeon/rv6xx_dpm.c if (new_state->low.vddc > old_state->low.vddc) vddc 1313 drivers/gpu/drm/radeon/rv6xx_dpm.c old_state->low.vddc, vddc 1314 drivers/gpu/drm/radeon/rv6xx_dpm.c new_state->low.vddc); vddc 1326 drivers/gpu/drm/radeon/rv6xx_dpm.c if (new_state->low.vddc < old_state->low.vddc) vddc 1328 drivers/gpu/drm/radeon/rv6xx_dpm.c old_state->low.vddc, vddc 1329 drivers/gpu/drm/radeon/rv6xx_dpm.c new_state->low.vddc); vddc 1822 drivers/gpu/drm/radeon/rv6xx_dpm.c u16 vddc; vddc 1845 drivers/gpu/drm/radeon/rv6xx_dpm.c pl->vddc = le16_to_cpu(clock_info->r600.usVDDC); vddc 1849 drivers/gpu/drm/radeon/rv6xx_dpm.c if (pl->vddc == 0xff01) { vddc 1850 drivers/gpu/drm/radeon/rv6xx_dpm.c if (radeon_atom_get_max_vddc(rdev, 0, 0, &vddc) == 0) vddc 1851 drivers/gpu/drm/radeon/rv6xx_dpm.c pl->vddc = vddc; vddc 1857 drivers/gpu/drm/radeon/rv6xx_dpm.c if (pl->vddc < 1100) vddc 1864 drivers/gpu/drm/radeon/rv6xx_dpm.c u16 vddc, vddci, mvdd; vddc 1865 drivers/gpu/drm/radeon/rv6xx_dpm.c radeon_atombios_get_default_voltages(rdev, &vddc, &vddci, &mvdd); vddc 1868 drivers/gpu/drm/radeon/rv6xx_dpm.c pl->vddc = vddc; vddc 2018 drivers/gpu/drm/radeon/rv6xx_dpm.c pl->sclk, pl->mclk, pl->vddc); vddc 2021 drivers/gpu/drm/radeon/rv6xx_dpm.c pl->sclk, pl->mclk, pl->vddc); vddc 2024 drivers/gpu/drm/radeon/rv6xx_dpm.c pl->sclk, pl->mclk, pl->vddc); vddc 2049 drivers/gpu/drm/radeon/rv6xx_dpm.c current_index, pl->sclk, pl->mclk, pl->vddc); vddc 40 drivers/gpu/drm/radeon/rv6xx_dpm.h u16 vddc[R600_PM_NUMBER_OF_VOLTAGE_LEVELS]; vddc 82 drivers/gpu/drm/radeon/rv6xx_dpm.h u16 vddc; vddc 246 drivers/gpu/drm/radeon/rv730_dpm.c &table->ACPIState.levels[0].vddc); vddc 253 drivers/gpu/drm/radeon/rv730_dpm.c &table->ACPIState.levels[0].vddc); vddc 364 drivers/gpu/drm/radeon/rv730_dpm.c initial_state->low.vddc, vddc 365 drivers/gpu/drm/radeon/rv730_dpm.c &table->initialState.levels[0].vddc); vddc 334 drivers/gpu/drm/radeon/rv740_dpm.c &table->ACPIState.levels[0].vddc); vddc 342 drivers/gpu/drm/radeon/rv740_dpm.c &table->ACPIState.levels[0].vddc); vddc 565 drivers/gpu/drm/radeon/rv770_dpm.c int rv770_populate_vddc_value(struct radeon_device *rdev, u16 vddc, vddc 578 drivers/gpu/drm/radeon/rv770_dpm.c if (vddc <= pi->vddc_table[i].vddc) { vddc 580 drivers/gpu/drm/radeon/rv770_dpm.c voltage->value = cpu_to_be16(vddc); vddc 663 drivers/gpu/drm/radeon/rv770_dpm.c ret = rv770_populate_vddc_value(rdev, pl->vddc, vddc 664 drivers/gpu/drm/radeon/rv770_dpm.c &level->vddc); vddc 942 drivers/gpu/drm/radeon/rv770_dpm.c &table->ACPIState.levels[0].vddc); vddc 956 drivers/gpu/drm/radeon/rv770_dpm.c &table->ACPIState.levels[0].vddc); vddc 1071 drivers/gpu/drm/radeon/rv770_dpm.c initial_state->low.vddc, vddc 1072 drivers/gpu/drm/radeon/rv770_dpm.c &table->initialState.levels[0].vddc); vddc 1133 drivers/gpu/drm/radeon/rv770_dpm.c pi->vddc_table[i].vddc)); vddc 1251 drivers/gpu/drm/radeon/rv770_dpm.c pi->vddc_table[i].vddc = (u16)(min + i * step); vddc 1253 drivers/gpu/drm/radeon/rv770_dpm.c pi->vddc_table[i].vddc, vddc 1692 drivers/gpu/drm/radeon/rv770_dpm.c u16 vddc; vddc 1694 drivers/gpu/drm/radeon/rv770_dpm.c if (radeon_atom_get_max_vddc(rdev, 0, 0, &vddc)) vddc 1697 drivers/gpu/drm/radeon/rv770_dpm.c pi->max_vddc = vddc; vddc 2202 drivers/gpu/drm/radeon/rv770_dpm.c pl->vddc = le16_to_cpu(clock_info->evergreen.usVDDC); vddc 2211 drivers/gpu/drm/radeon/rv770_dpm.c pl->vddc = le16_to_cpu(clock_info->r600.usVDDC); vddc 2219 drivers/gpu/drm/radeon/rv770_dpm.c if (pl->vddc == 0xff01) { vddc 2221 drivers/gpu/drm/radeon/rv770_dpm.c pl->vddc = pi->max_vddc; vddc 2225 drivers/gpu/drm/radeon/rv770_dpm.c pi->acpi_vddc = pl->vddc; vddc 2241 drivers/gpu/drm/radeon/rv770_dpm.c if (pi->min_vddc_in_table > pl->vddc) vddc 2242 drivers/gpu/drm/radeon/rv770_dpm.c pi->min_vddc_in_table = pl->vddc; vddc 2244 drivers/gpu/drm/radeon/rv770_dpm.c if (pi->max_vddc_in_table < pl->vddc) vddc 2245 drivers/gpu/drm/radeon/rv770_dpm.c pi->max_vddc_in_table = pl->vddc; vddc 2249 drivers/gpu/drm/radeon/rv770_dpm.c u16 vddc, vddci, mvdd; vddc 2250 drivers/gpu/drm/radeon/rv770_dpm.c radeon_atombios_get_default_voltages(rdev, &vddc, &vddci, &mvdd); vddc 2253 drivers/gpu/drm/radeon/rv770_dpm.c pl->vddc = vddc; vddc 2261 drivers/gpu/drm/radeon/rv770_dpm.c rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddc = pl->vddc; vddc 2444 drivers/gpu/drm/radeon/rv770_dpm.c pl->sclk, pl->mclk, pl->vddc, pl->vddci); vddc 2447 drivers/gpu/drm/radeon/rv770_dpm.c pl->sclk, pl->mclk, pl->vddc, pl->vddci); vddc 2450 drivers/gpu/drm/radeon/rv770_dpm.c pl->sclk, pl->mclk, pl->vddc, pl->vddci); vddc 2454 drivers/gpu/drm/radeon/rv770_dpm.c pl->sclk, pl->mclk, pl->vddc); vddc 2457 drivers/gpu/drm/radeon/rv770_dpm.c pl->sclk, pl->mclk, pl->vddc); vddc 2460 drivers/gpu/drm/radeon/rv770_dpm.c pl->sclk, pl->mclk, pl->vddc); vddc 2487 drivers/gpu/drm/radeon/rv770_dpm.c current_index, pl->sclk, pl->mclk, pl->vddc, pl->vddci); vddc 2490 drivers/gpu/drm/radeon/rv770_dpm.c current_index, pl->sclk, pl->mclk, pl->vddc); vddc 66 drivers/gpu/drm/radeon/rv770_dpm.h u16 vddc; vddc 145 drivers/gpu/drm/radeon/rv770_dpm.h u16 vddc; vddc 218 drivers/gpu/drm/radeon/rv770_dpm.h int rv770_populate_vddc_value(struct radeon_device *rdev, u16 vddc, vddc 110 drivers/gpu/drm/radeon/rv770_smc.h RV770_SMC_VOLTAGE_VALUE vddc; vddc 1775 drivers/gpu/drm/radeon/si_dpm.c s64 kt, kv, leakage_w, i_leakage, vddc; vddc 1780 drivers/gpu/drm/radeon/si_dpm.c vddc = div64_s64(drm_int2fixp(v), 1000); vddc 1789 drivers/gpu/drm/radeon/si_dpm.c tmp = drm_fixp_mul(t_slope, vddc) + t_intercept; vddc 1792 drivers/gpu/drm/radeon/si_dpm.c kv = drm_fixp_mul(av, drm_fixp_exp(drm_fixp_mul(bv, vddc))); vddc 1794 drivers/gpu/drm/radeon/si_dpm.c leakage_w = drm_fixp_mul(drm_fixp_mul(drm_fixp_mul(i_leakage, kt), kv), vddc); vddc 1813 drivers/gpu/drm/radeon/si_dpm.c s64 kt, kv, leakage_w, i_leakage, vddc; vddc 1816 drivers/gpu/drm/radeon/si_dpm.c vddc = div64_s64(drm_int2fixp(v), 1000); vddc 1820 drivers/gpu/drm/radeon/si_dpm.c drm_fixp_exp(drm_fixp_mul(div64_s64(drm_int2fixp(coeff->bv), 100000000), vddc))); vddc 1822 drivers/gpu/drm/radeon/si_dpm.c leakage_w = drm_fixp_mul(drm_fixp_mul(drm_fixp_mul(i_leakage, kt), kv), vddc); vddc 2295 drivers/gpu/drm/radeon/si_dpm.c SISLANDS_SMC_VOLTAGE_VALUE vddc; vddc 2352 drivers/gpu/drm/radeon/si_dpm.c state->performance_levels[i-1].vddc, &vddc); vddc 2356 drivers/gpu/drm/radeon/si_dpm.c ret = si_get_std_voltage_value(rdev, &vddc, &prev_std_vddc); vddc 2361 drivers/gpu/drm/radeon/si_dpm.c state->performance_levels[i].vddc, &vddc); vddc 2365 drivers/gpu/drm/radeon/si_dpm.c ret = si_get_std_voltage_value(rdev, &vddc, &curr_std_vddc); vddc 2551 drivers/gpu/drm/radeon/si_dpm.c if (table->entries[i].vddc > *max) vddc 2552 drivers/gpu/drm/radeon/si_dpm.c *max = table->entries[i].vddc; vddc 2553 drivers/gpu/drm/radeon/si_dpm.c if (table->entries[i].vddc < *min) vddc 2554 drivers/gpu/drm/radeon/si_dpm.c *min = table->entries[i].vddc; vddc 2976 drivers/gpu/drm/radeon/si_dpm.c u16 vddc, vddci, min_vce_voltage = 0; vddc 3032 drivers/gpu/drm/radeon/si_dpm.c if (ps->performance_levels[i].vddc > ps->performance_levels[i+1].vddc) vddc 3033 drivers/gpu/drm/radeon/si_dpm.c ps->performance_levels[i].vddc = ps->performance_levels[i+1].vddc; vddc 3041 drivers/gpu/drm/radeon/si_dpm.c if (ps->performance_levels[i].vddc > max_limits->vddc) vddc 3042 drivers/gpu/drm/radeon/si_dpm.c ps->performance_levels[i].vddc = max_limits->vddc; vddc 3091 drivers/gpu/drm/radeon/si_dpm.c vddc = ps->performance_levels[ps->performance_level_count - 1].vddc; vddc 3094 drivers/gpu/drm/radeon/si_dpm.c vddc = ps->performance_levels[0].vddc; vddc 3107 drivers/gpu/drm/radeon/si_dpm.c ps->performance_levels[0].vddc = vddc; vddc 3118 drivers/gpu/drm/radeon/si_dpm.c ps->performance_levels[i].vddc = vddc; vddc 3124 drivers/gpu/drm/radeon/si_dpm.c if (ps->performance_levels[i].vddc < ps->performance_levels[i - 1].vddc) vddc 3125 drivers/gpu/drm/radeon/si_dpm.c ps->performance_levels[i].vddc = ps->performance_levels[i - 1].vddc; vddc 3153 drivers/gpu/drm/radeon/si_dpm.c if (ps->performance_levels[i].vddc < min_vce_voltage) vddc 3154 drivers/gpu/drm/radeon/si_dpm.c ps->performance_levels[i].vddc = min_vce_voltage; vddc 3157 drivers/gpu/drm/radeon/si_dpm.c max_limits->vddc, &ps->performance_levels[i].vddc); vddc 3163 drivers/gpu/drm/radeon/si_dpm.c max_limits->vddc, &ps->performance_levels[i].vddc); vddc 3166 drivers/gpu/drm/radeon/si_dpm.c max_limits->vddc, &ps->performance_levels[i].vddc); vddc 3171 drivers/gpu/drm/radeon/si_dpm.c max_limits->vddc, max_limits->vddci, vddc 3172 drivers/gpu/drm/radeon/si_dpm.c &ps->performance_levels[i].vddc, vddc 3178 drivers/gpu/drm/radeon/si_dpm.c if (ps->performance_levels[i].vddc > rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddc) vddc 3236 drivers/gpu/drm/radeon/si_dpm.c u16 vddc, count = 0; vddc 3240 drivers/gpu/drm/radeon/si_dpm.c ret = radeon_atom_get_leakage_vddc_based_on_leakage_idx(rdev, &vddc, SISLANDS_LEAKAGE_INDEX0 + i); vddc 3242 drivers/gpu/drm/radeon/si_dpm.c if (!ret && (vddc > 0) && (vddc != (SISLANDS_LEAKAGE_INDEX0 + i))) { vddc 3243 drivers/gpu/drm/radeon/si_dpm.c si_pi->leakage_voltage.entries[count].voltage = vddc; vddc 4167 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.dyn_state.cac_leakage_table.entries[v_index].vddc; vddc 4170 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.dyn_state.cac_leakage_table.entries[rdev->pm.dpm.dyn_state.cac_leakage_table.count-1].vddc; vddc 4182 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.dyn_state.cac_leakage_table.entries[v_index].vddc; vddc 4185 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.dyn_state.cac_leakage_table.entries[rdev->pm.dpm.dyn_state.cac_leakage_table.count-1].vddc; vddc 4192 drivers/gpu/drm/radeon/si_dpm.c *std_voltage = rdev->pm.dpm.dyn_state.cac_leakage_table.entries[voltage->index].vddc; vddc 4421 drivers/gpu/drm/radeon/si_dpm.c initial_state->performance_levels[0].vddc, vddc 4422 drivers/gpu/drm/radeon/si_dpm.c &table->initialState.levels[0].vddc); vddc 4428 drivers/gpu/drm/radeon/si_dpm.c &table->initialState.levels[0].vddc, vddc 4432 drivers/gpu/drm/radeon/si_dpm.c table->initialState.levels[0].vddc.index, vddc 4445 drivers/gpu/drm/radeon/si_dpm.c initial_state->performance_levels[0].vddc, vddc 4448 drivers/gpu/drm/radeon/si_dpm.c &table->initialState.levels[0].vddc); vddc 4515 drivers/gpu/drm/radeon/si_dpm.c pi->acpi_vddc, &table->ACPIState.levels[0].vddc); vddc 4520 drivers/gpu/drm/radeon/si_dpm.c &table->ACPIState.levels[0].vddc, &std_vddc); vddc 4523 drivers/gpu/drm/radeon/si_dpm.c table->ACPIState.levels[0].vddc.index, vddc 4534 drivers/gpu/drm/radeon/si_dpm.c &table->ACPIState.levels[0].vddc); vddc 4538 drivers/gpu/drm/radeon/si_dpm.c pi->min_vddc_in_table, &table->ACPIState.levels[0].vddc); vddc 4543 drivers/gpu/drm/radeon/si_dpm.c &table->ACPIState.levels[0].vddc, &std_vddc); vddc 4547 drivers/gpu/drm/radeon/si_dpm.c table->ACPIState.levels[0].vddc.index, vddc 4561 drivers/gpu/drm/radeon/si_dpm.c &table->ACPIState.levels[0].vddc); vddc 4652 drivers/gpu/drm/radeon/si_dpm.c state->levels[0].std_vddc = state->levels[0].vddc; vddc 4759 drivers/gpu/drm/radeon/si_dpm.c if (ulv->supported && ulv->pl.vddc) { vddc 5047 drivers/gpu/drm/radeon/si_dpm.c pl->vddc, &level->vddc); vddc 5052 drivers/gpu/drm/radeon/si_dpm.c ret = si_get_std_voltage_value(rdev, &level->vddc, &std_vddc); vddc 5057 drivers/gpu/drm/radeon/si_dpm.c level->vddc.index, &level->std_vddc); vddc 5071 drivers/gpu/drm/radeon/si_dpm.c pl->vddc, vddc 5074 drivers/gpu/drm/radeon/si_dpm.c &level->vddc); vddc 5163 drivers/gpu/drm/radeon/si_dpm.c if (ulv->pl.vddc < vddc 5300 drivers/gpu/drm/radeon/si_dpm.c if (ulv->supported && ulv->pl.vddc) { vddc 5673 drivers/gpu/drm/radeon/si_dpm.c if (ulv->supported && ulv->pl.vddc != 0) vddc 6751 drivers/gpu/drm/radeon/si_dpm.c pl->vddc = le16_to_cpu(clock_info->si.usVDDC); vddc 6760 drivers/gpu/drm/radeon/si_dpm.c ret = si_get_leakage_voltage_from_leakage_index(rdev, pl->vddc, vddc 6763 drivers/gpu/drm/radeon/si_dpm.c pl->vddc = leakage_voltage; vddc 6766 drivers/gpu/drm/radeon/si_dpm.c pi->acpi_vddc = pl->vddc; vddc 6782 drivers/gpu/drm/radeon/si_dpm.c if (pi->min_vddc_in_table > pl->vddc) vddc 6783 drivers/gpu/drm/radeon/si_dpm.c pi->min_vddc_in_table = pl->vddc; vddc 6785 drivers/gpu/drm/radeon/si_dpm.c if (pi->max_vddc_in_table < pl->vddc) vddc 6786 drivers/gpu/drm/radeon/si_dpm.c pi->max_vddc_in_table = pl->vddc; vddc 6790 drivers/gpu/drm/radeon/si_dpm.c u16 vddc, vddci, mvdd; vddc 6791 drivers/gpu/drm/radeon/si_dpm.c radeon_atombios_get_default_voltages(rdev, &vddc, &vddci, &mvdd); vddc 6794 drivers/gpu/drm/radeon/si_dpm.c pl->vddc = vddc; vddc 6803 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddc = pl->vddc; vddc 7109 drivers/gpu/drm/radeon/si_dpm.c current_index, pl->sclk, pl->mclk, pl->vddc, pl->vddci, pl->pcie_gen + 1); vddc 155 drivers/gpu/drm/radeon/sislands_smc.h SISLANDS_SMC_VOLTAGE_VALUE vddc;