vdc_reg           408 drivers/gpu/drm/gma500/intel_gmbus.c 		dev_priv->gmbus_reg = dev_priv->vdc_reg;
vdc_reg           186 drivers/gpu/drm/gma500/psb_drv.c 		if (dev_priv->vdc_reg) {
vdc_reg           187 drivers/gpu/drm/gma500/psb_drv.c 			iounmap(dev_priv->vdc_reg);
vdc_reg           188 drivers/gpu/drm/gma500/psb_drv.c 			dev_priv->vdc_reg = NULL;
vdc_reg           237 drivers/gpu/drm/gma500/psb_drv.c 	dev_priv->vdc_reg =
vdc_reg           239 drivers/gpu/drm/gma500/psb_drv.c 	if (!dev_priv->vdc_reg)
vdc_reg           267 drivers/gpu/drm/gma500/psb_drv.c 			dev_priv->aux_reg = dev_priv->vdc_reg;
vdc_reg           292 drivers/gpu/drm/gma500/psb_drv.c 		dev_priv->gmbus_reg = dev_priv->vdc_reg;
vdc_reg           462 drivers/gpu/drm/gma500/psb_drv.h 	uint8_t __iomem *vdc_reg;
vdc_reg           814 drivers/gpu/drm/gma500/psb_drv.h 	return ioread32(dev_priv->vdc_reg + reg);
vdc_reg           846 drivers/gpu/drm/gma500/psb_drv.h 	iowrite32((val), dev_priv->vdc_reg + (reg));
vdc_reg           874 drivers/gpu/drm/gma500/psb_drv.h 	iowrite16((val), dev_priv->vdc_reg + (reg));
vdc_reg           883 drivers/gpu/drm/gma500/psb_drv.h 	iowrite8((val), dev_priv->vdc_reg + (reg));
vdc_reg           888 drivers/gpu/drm/gma500/psb_drv.h #define PSB_WVDC32(_val, _offs)		iowrite32(_val, dev_priv->vdc_reg + (_offs))
vdc_reg           889 drivers/gpu/drm/gma500/psb_drv.h #define PSB_RVDC32(_offs)		ioread32(dev_priv->vdc_reg + (_offs))