vctl1            1091 drivers/gpu/drm/i915/display/intel_tv.c 	u32 tv_ctl, hctl1, hctl3, vctl1, vctl2, tmp;
vctl1            1102 drivers/gpu/drm/i915/display/intel_tv.c 	vctl1 = I915_READ(TV_V_CTL_1);
vctl1            1111 drivers/gpu/drm/i915/display/intel_tv.c 	tv_mode.nbr_end = (vctl1 & TV_NBR_END_MASK) >> TV_NBR_END_SHIFT;
vctl1            1112 drivers/gpu/drm/i915/display/intel_tv.c 	tv_mode.vi_end_f1 = (vctl1 & TV_VI_END_F1_MASK) >> TV_VI_END_F1_SHIFT;
vctl1            1113 drivers/gpu/drm/i915/display/intel_tv.c 	tv_mode.vi_end_f2 = (vctl1 & TV_VI_END_F2_MASK) >> TV_VI_END_F2_SHIFT;
vctl1            1343 drivers/gpu/drm/i915/display/intel_tv.c 	u32 vctl1, vctl2, vctl3, vctl4, vctl5, vctl6, vctl7;
vctl1            1357 drivers/gpu/drm/i915/display/intel_tv.c 	vctl1 = (tv_mode->nbr_end << TV_NBR_END_SHIFT) |
vctl1            1387 drivers/gpu/drm/i915/display/intel_tv.c 	I915_WRITE(TV_V_CTL_1, vctl1);