vcpi 163 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c sa->vcp_id = mst_mgr->proposed_vcpis[i]->vcpi; vcpi 282 drivers/gpu/drm/drm_dp_mst_topology.c buf[idx] = (req->u.allocate_payload.vcpi & 0x7f); vcpi 302 drivers/gpu/drm/drm_dp_mst_topology.c buf[idx] = (req->u.query_payload.vcpi & 0x7f); vcpi 581 drivers/gpu/drm/drm_dp_mst_topology.c repmsg->u.allocate_payload.vcpi = raw->msg[idx]; vcpi 770 drivers/gpu/drm/drm_dp_mst_topology.c u8 vcpi, uint16_t pbn, vcpi 778 drivers/gpu/drm/drm_dp_mst_topology.c req.u.allocate_payload.vcpi = vcpi; vcpi 805 drivers/gpu/drm/drm_dp_mst_topology.c struct drm_dp_vcpi *vcpi) vcpi 826 drivers/gpu/drm/drm_dp_mst_topology.c vcpi->vcpi = vcpi_ret + 1; vcpi 827 drivers/gpu/drm/drm_dp_mst_topology.c mgr->proposed_vcpis[ret - 1] = vcpi; vcpi 834 drivers/gpu/drm/drm_dp_mst_topology.c int vcpi) vcpi 837 drivers/gpu/drm/drm_dp_mst_topology.c if (vcpi == 0) vcpi 841 drivers/gpu/drm/drm_dp_mst_topology.c DRM_DEBUG_KMS("putting payload %d\n", vcpi); vcpi 842 drivers/gpu/drm/drm_dp_mst_topology.c clear_bit(vcpi - 1, &mgr->vcpi_mask); vcpi 846 drivers/gpu/drm/drm_dp_mst_topology.c if (mgr->proposed_vcpis[i]->vcpi == vcpi) { vcpi 2356 drivers/gpu/drm/drm_dp_mst_topology.c ret = drm_dp_payload_send_msg(mgr, port, id, port->vcpi.pbn); vcpi 2409 drivers/gpu/drm/drm_dp_mst_topology.c struct drm_dp_vcpi *vcpi = mgr->proposed_vcpis[i]; vcpi 2416 drivers/gpu/drm/drm_dp_mst_topology.c if (vcpi) { vcpi 2417 drivers/gpu/drm/drm_dp_mst_topology.c port = container_of(vcpi, struct drm_dp_mst_port, vcpi 2418 drivers/gpu/drm/drm_dp_mst_topology.c vcpi); vcpi 2423 drivers/gpu/drm/drm_dp_mst_topology.c if (vcpi->num_slots) { vcpi 2433 drivers/gpu/drm/drm_dp_mst_topology.c req_payload.num_slots = vcpi->num_slots; vcpi 2434 drivers/gpu/drm/drm_dp_mst_topology.c req_payload.vcpi = vcpi->vcpi; vcpi 2446 drivers/gpu/drm/drm_dp_mst_topology.c drm_dp_create_payload_step1(mgr, vcpi->vcpi, vcpi 2449 drivers/gpu/drm/drm_dp_mst_topology.c payload->vcpi = req_payload.vcpi; vcpi 2454 drivers/gpu/drm/drm_dp_mst_topology.c payload->vcpi, vcpi 2518 drivers/gpu/drm/drm_dp_mst_topology.c port = container_of(mgr->proposed_vcpis[i], struct drm_dp_mst_port, vcpi); vcpi 2522 drivers/gpu/drm/drm_dp_mst_topology.c ret = drm_dp_create_payload_step2(mgr, port, mgr->proposed_vcpis[i]->vcpi, &mgr->payloads[i]); vcpi 2524 drivers/gpu/drm/drm_dp_mst_topology.c ret = drm_dp_destroy_payload_step2(mgr, mgr->proposed_vcpis[i]->vcpi, &mgr->payloads[i]); vcpi 3193 drivers/gpu/drm/drm_dp_mst_topology.c struct drm_dp_vcpi *vcpi, int pbn, int slots) vcpi 3201 drivers/gpu/drm/drm_dp_mst_topology.c vcpi->pbn = pbn; vcpi 3202 drivers/gpu/drm/drm_dp_mst_topology.c vcpi->aligned_pbn = slots * mgr->pbn_div; vcpi 3203 drivers/gpu/drm/drm_dp_mst_topology.c vcpi->num_slots = slots; vcpi 3205 drivers/gpu/drm/drm_dp_mst_topology.c ret = drm_dp_mst_assign_payload_id(mgr, vcpi); vcpi 3246 drivers/gpu/drm/drm_dp_mst_topology.c struct drm_dp_vcpi_allocation *pos, *vcpi = NULL; vcpi 3256 drivers/gpu/drm/drm_dp_mst_topology.c vcpi = pos; vcpi 3257 drivers/gpu/drm/drm_dp_mst_topology.c prev_slots = vcpi->vcpi; vcpi 3273 drivers/gpu/drm/drm_dp_mst_topology.c if (!vcpi) vcpi 3283 drivers/gpu/drm/drm_dp_mst_topology.c if (!vcpi) { vcpi 3284 drivers/gpu/drm/drm_dp_mst_topology.c vcpi = kzalloc(sizeof(*vcpi), GFP_KERNEL); vcpi 3285 drivers/gpu/drm/drm_dp_mst_topology.c if (!vcpi) vcpi 3289 drivers/gpu/drm/drm_dp_mst_topology.c vcpi->port = port; vcpi 3290 drivers/gpu/drm/drm_dp_mst_topology.c list_add(&vcpi->next, &topology_state->vcpis); vcpi 3292 drivers/gpu/drm/drm_dp_mst_topology.c vcpi->vcpi = req_slots; vcpi 3349 drivers/gpu/drm/drm_dp_mst_topology.c DRM_DEBUG_ATOMIC("[MST PORT:%p] VCPI %d -> 0\n", port, pos->vcpi); vcpi 3350 drivers/gpu/drm/drm_dp_mst_topology.c if (pos->vcpi) { vcpi 3352 drivers/gpu/drm/drm_dp_mst_topology.c pos->vcpi = 0; vcpi 3378 drivers/gpu/drm/drm_dp_mst_topology.c if (port->vcpi.vcpi > 0) { vcpi 3380 drivers/gpu/drm/drm_dp_mst_topology.c port->vcpi.vcpi, port->vcpi.pbn, pbn); vcpi 3381 drivers/gpu/drm/drm_dp_mst_topology.c if (pbn == port->vcpi.pbn) { vcpi 3387 drivers/gpu/drm/drm_dp_mst_topology.c ret = drm_dp_init_vcpi(mgr, &port->vcpi, pbn, slots); vcpi 3394 drivers/gpu/drm/drm_dp_mst_topology.c pbn, port->vcpi.num_slots); vcpi 3412 drivers/gpu/drm/drm_dp_mst_topology.c slots = port->vcpi.num_slots; vcpi 3432 drivers/gpu/drm/drm_dp_mst_topology.c port->vcpi.num_slots = 0; vcpi 3447 drivers/gpu/drm/drm_dp_mst_topology.c if (!port->vcpi.vcpi) vcpi 3450 drivers/gpu/drm/drm_dp_mst_topology.c drm_dp_mst_put_payload_id(mgr, port->vcpi.vcpi); vcpi 3451 drivers/gpu/drm/drm_dp_mst_topology.c port->vcpi.num_slots = 0; vcpi 3452 drivers/gpu/drm/drm_dp_mst_topology.c port->vcpi.pbn = 0; vcpi 3453 drivers/gpu/drm/drm_dp_mst_topology.c port->vcpi.aligned_pbn = 0; vcpi 3454 drivers/gpu/drm/drm_dp_mst_topology.c port->vcpi.vcpi = 0; vcpi 3681 drivers/gpu/drm/drm_dp_mst_topology.c port = container_of(mgr->proposed_vcpis[i], struct drm_dp_mst_port, vcpi); vcpi 3684 drivers/gpu/drm/drm_dp_mst_topology.c port->port_num, port->vcpi.vcpi, vcpi 3685 drivers/gpu/drm/drm_dp_mst_topology.c port->vcpi.num_slots, vcpi 3778 drivers/gpu/drm/drm_dp_mst_topology.c struct drm_dp_vcpi_allocation *pos, *vcpi; vcpi 3790 drivers/gpu/drm/drm_dp_mst_topology.c if (!pos->vcpi) vcpi 3793 drivers/gpu/drm/drm_dp_mst_topology.c vcpi = kmemdup(pos, sizeof(*vcpi), GFP_KERNEL); vcpi 3794 drivers/gpu/drm/drm_dp_mst_topology.c if (!vcpi) vcpi 3797 drivers/gpu/drm/drm_dp_mst_topology.c drm_dp_mst_get_port_malloc(vcpi->port); vcpi 3798 drivers/gpu/drm/drm_dp_mst_topology.c list_add(&vcpi->next, &state->vcpis); vcpi 3804 drivers/gpu/drm/drm_dp_mst_topology.c list_for_each_entry_safe(pos, vcpi, &state->vcpis, next) { vcpi 3822 drivers/gpu/drm/drm_dp_mst_topology.c if (pos->vcpi) vcpi 3834 drivers/gpu/drm/drm_dp_mst_topology.c struct drm_dp_vcpi_allocation *vcpi; vcpi 3837 drivers/gpu/drm/drm_dp_mst_topology.c list_for_each_entry(vcpi, &mst_state->vcpis, next) { vcpi 3839 drivers/gpu/drm/drm_dp_mst_topology.c if (!vcpi->vcpi) { vcpi 3841 drivers/gpu/drm/drm_dp_mst_topology.c vcpi->port); vcpi 3846 drivers/gpu/drm/drm_dp_mst_topology.c vcpi->port, vcpi->vcpi); vcpi 3848 drivers/gpu/drm/drm_dp_mst_topology.c avail_slots -= vcpi->vcpi; vcpi 3851 drivers/gpu/drm/drm_dp_mst_topology.c vcpi->port, mst_state, vcpi 3852 drivers/gpu/drm/drm_dp_mst_topology.c avail_slots + vcpi->vcpi); vcpi 693 drivers/gpu/drm/nouveau/dispnv50/disp.c int vcpi = mstc->port->vcpi.vcpi, i; vcpi 697 drivers/gpu/drm/nouveau/dispnv50/disp.c NV_ATOMIC(drm, "%s: vcpi %d\n", msto->encoder.name, vcpi); vcpi 701 drivers/gpu/drm/nouveau/dispnv50/disp.c mstm->outp->base.base.name, i, payload->vcpi, vcpi 707 drivers/gpu/drm/nouveau/dispnv50/disp.c if (payload->vcpi == vcpi) vcpi 741 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nv50_disp_sor_dp_mst_vcpi_v0 vcpi; vcpi 753 drivers/gpu/drm/nouveau/dispnv50/disp.c if (mstc->port->vcpi.vcpi > 0) { vcpi 756 drivers/gpu/drm/nouveau/dispnv50/disp.c args.vcpi.start_slot = payload->start_slot; vcpi 757 drivers/gpu/drm/nouveau/dispnv50/disp.c args.vcpi.num_slots = payload->num_slots; vcpi 758 drivers/gpu/drm/nouveau/dispnv50/disp.c args.vcpi.pbn = mstc->port->vcpi.pbn; vcpi 759 drivers/gpu/drm/nouveau/dispnv50/disp.c args.vcpi.aligned_pbn = mstc->port->vcpi.aligned_pbn; vcpi 765 drivers/gpu/drm/nouveau/dispnv50/disp.c args.vcpi.start_slot, args.vcpi.num_slots, vcpi 766 drivers/gpu/drm/nouveau/dispnv50/disp.c args.vcpi.pbn, args.vcpi.aligned_pbn); vcpi 79 drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.h void (*vcpi)(struct nvkm_ior *, int head, u8 slot, vcpi 258 drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c if (!outp->ior->func->dp.vcpi) vcpi 260 drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c outp->ior->func->dp.vcpi(outp->ior, hidx, vcpi 172 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c .vcpi = gf119_sor_dp_vcpi, vcpi 38 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgk104.c .vcpi = gf119_sor_dp_vcpi, vcpi 52 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm107.c .vcpi = gf119_sor_dp_vcpi, vcpi 110 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c .vcpi = gf119_sor_dp_vcpi, vcpi 83 drivers/gpu/drm/nouveau/nvkm/engine/disp/sortu102.c .vcpi = tu102_sor_dp_vcpi, vcpi 39 include/drm/drm_dp_mst_helper.h int vcpi; vcpi 97 include/drm/drm_dp_mst_helper.h struct drm_dp_vcpi vcpi; vcpi 252 include/drm/drm_dp_mst_helper.h u8 vcpi; vcpi 259 include/drm/drm_dp_mst_helper.h u8 vcpi; vcpi 326 include/drm/drm_dp_mst_helper.h u8 vcpi; vcpi 423 include/drm/drm_dp_mst_helper.h int vcpi; vcpi 430 include/drm/drm_dp_mst_helper.h int vcpi;