vce 935 drivers/gpu/drm/amd/amdgpu/amdgpu.h struct amdgpu_vce vce; vce 149 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c rings[0] = &adev->vce.ring[0]; vce 210 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c fw_info->ver = adev->vce.fw_version; vce 211 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c fw_info->feature = adev->vce.fb_version; vce 354 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c for (i = 0; i < adev->vce.num_rings; i++) vce 355 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (adev->vce.ring[i].sched.ready) vce 708 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (adev->vce.fw_version && vce 709 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c adev->vce.fw_version < AMDGPU_VCE_FW_53_45) vce 732 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev_info.vce_harvest_config = adev->vce.harvest_config; vce 393 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c FW_VERSION_ATTR(vce_fw_version, 0444, vce.fw_version); vce 154 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c r = request_firmware(&adev->vce.fw, fw_name, adev->dev); vce 161 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c r = amdgpu_ucode_validate(adev->vce.fw); vce 165 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c release_firmware(adev->vce.fw); vce 166 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c adev->vce.fw = NULL; vce 170 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c hdr = (const struct common_firmware_header *)adev->vce.fw->data; vce 178 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c adev->vce.fw_version = ((version_major << 24) | (version_minor << 16) | vce 182 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c AMDGPU_GEM_DOMAIN_VRAM, &adev->vce.vcpu_bo, vce 183 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c &adev->vce.gpu_addr, &adev->vce.cpu_addr); vce 190 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c atomic_set(&adev->vce.handles[i], 0); vce 191 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c adev->vce.filp[i] = NULL; vce 194 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c INIT_DELAYED_WORK(&adev->vce.idle_work, amdgpu_vce_idle_work_handler); vce 195 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c mutex_init(&adev->vce.idle_mutex); vce 211 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c if (adev->vce.vcpu_bo == NULL) vce 214 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c drm_sched_entity_destroy(&adev->vce.entity); vce 216 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c amdgpu_bo_free_kernel(&adev->vce.vcpu_bo, &adev->vce.gpu_addr, vce 217 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c (void **)&adev->vce.cpu_addr); vce 219 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c for (i = 0; i < adev->vce.num_rings; i++) vce 220 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c amdgpu_ring_fini(&adev->vce.ring[i]); vce 222 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c release_firmware(adev->vce.fw); vce 223 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c mutex_destroy(&adev->vce.idle_mutex); vce 240 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c ring = &adev->vce.ring[0]; vce 242 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c r = drm_sched_entity_init(&adev->vce.entity, &rq, 1, NULL); vce 261 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c cancel_delayed_work_sync(&adev->vce.idle_work); vce 263 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c if (adev->vce.vcpu_bo == NULL) vce 267 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c if (atomic_read(&adev->vce.handles[i])) vce 290 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c if (adev->vce.vcpu_bo == NULL) vce 293 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c r = amdgpu_bo_reserve(adev->vce.vcpu_bo, false); vce 299 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c r = amdgpu_bo_kmap(adev->vce.vcpu_bo, &cpu_addr); vce 301 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c amdgpu_bo_unreserve(adev->vce.vcpu_bo); vce 306 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c hdr = (const struct common_firmware_header *)adev->vce.fw->data; vce 308 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c memcpy_toio(cpu_addr, adev->vce.fw->data + offset, vce 309 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c adev->vce.fw->size - offset); vce 311 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c amdgpu_bo_kunmap(adev->vce.vcpu_bo); vce 313 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c amdgpu_bo_unreserve(adev->vce.vcpu_bo); vce 328 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c container_of(work, struct amdgpu_device, vce.idle_work.work); vce 331 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c for (i = 0; i < adev->vce.num_rings; i++) vce 332 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c count += amdgpu_fence_count_emitted(&adev->vce.ring[i]); vce 345 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c schedule_delayed_work(&adev->vce.idle_work, VCE_IDLE_TIMEOUT); vce 364 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c mutex_lock(&adev->vce.idle_mutex); vce 365 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c set_clocks = !cancel_delayed_work_sync(&adev->vce.idle_work); vce 378 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c mutex_unlock(&adev->vce.idle_mutex); vce 391 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c schedule_delayed_work(&ring->adev->vce.idle_work, VCE_IDLE_TIMEOUT); vce 404 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c struct amdgpu_ring *ring = &adev->vce.ring[0]; vce 407 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c uint32_t handle = atomic_read(&adev->vce.handles[i]); vce 409 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c if (!handle || adev->vce.filp[i] != filp) vce 416 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c adev->vce.filp[i] = NULL; vce 417 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c atomic_set(&adev->vce.handles[i], 0); vce 456 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c if ((ring->adev->vce.fw_version >> 24) >= 52) vce 471 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c if ((ring->adev->vce.fw_version >> 24) >= 52) { vce 550 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c r = amdgpu_job_submit(job, &ring->adev->vce.entity, vce 680 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c if (atomic_read(&p->adev->vce.handles[i]) == handle) { vce 681 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c if (p->adev->vce.filp[i] != p->filp) { vce 691 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c if (!atomic_cmpxchg(&p->adev->vce.handles[i], 0, handle)) { vce 692 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c p->adev->vce.filp[i] = p->filp; vce 693 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c p->adev->vce.img_size[i] = 0; vce 804 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c size = &p->adev->vce.img_size[session_idx]; vce 934 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c atomic_set(&p->adev->vce.handles[i], 0); vce 1024 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c atomic_set(&p->adev->vce.handles[i], 0); vce 1118 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c if (ring != &ring->adev->vce.ring[0]) vce 183 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c WREG32(mmVCE_LMI_VCPU_CACHE_40BIT_BAR, (adev->vce.gpu_addr >> 8)); vce 243 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c ring = &adev->vce.ring[0]; vce 250 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c ring = &adev->vce.ring[1]; vce 405 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c adev->vce.num_rings = 2; vce 420 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 167, &adev->vce.irq); vce 433 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c for (i = 0; i < adev->vce.num_rings; i++) { vce 434 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c ring = &adev->vce.ring[i]; vce 437 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c &adev->vce.irq, 0); vce 467 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c for (i = 0; i < adev->vce.num_rings; i++) { vce 468 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c r = amdgpu_ring_test_helper(&adev->vce.ring[i]); vce 539 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c amdgpu_fence_process(&adev->vce.ring[entry->src_data[0]]); vce 629 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c for (i = 0; i < adev->vce.num_rings; i++) { vce 630 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c adev->vce.ring[i].funcs = &vce_v2_0_ring_funcs; vce 631 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c adev->vce.ring[i].me = i; vce 642 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c adev->vce.irq.num_types = 1; vce 643 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c adev->vce.irq.funcs = &vce_v2_0_irq_funcs; vce 83 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c if (adev->vce.harvest_config == 0 || vce 84 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE1) vce 86 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c else if (adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE0) vce 115 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c if (adev->vce.harvest_config == 0 || vce 116 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE1) vce 118 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c else if (adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE0) vce 146 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c if (adev->vce.harvest_config == 0 || vce 147 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE1) vce 149 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c else if (adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE0) vce 272 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c if (adev->vce.harvest_config & (1 << idx)) vce 279 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c if (idx != 1 || adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE0) { vce 280 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c ring = &adev->vce.ring[0]; vce 287 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c ring = &adev->vce.ring[1]; vce 294 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c ring = &adev->vce.ring[2]; vce 337 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c if (adev->vce.harvest_config & (1 << idx)) vce 403 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c adev->vce.harvest_config = vce_v3_0_get_harvest_config(adev); vce 405 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c if ((adev->vce.harvest_config & vce 410 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c adev->vce.num_rings = 3; vce 425 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_VCE_TRAP, &adev->vce.irq); vce 435 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c if (adev->vce.fw_version < FW_52_8_3) vce 436 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c adev->vce.num_rings = 2; vce 442 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c for (i = 0; i < adev->vce.num_rings; i++) { vce 443 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c ring = &adev->vce.ring[i]; vce 445 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c r = amdgpu_ring_init(adev, ring, 512, &adev->vce.irq, 0); vce 476 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c for (i = 0; i < adev->vce.num_rings; i++) { vce 477 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c r = amdgpu_ring_test_helper(&adev->vce.ring[i]); vce 541 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c WREG32(mmVCE_LMI_VCPU_CACHE_40BIT_BAR0, (adev->vce.gpu_addr >> 8)); vce 542 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c WREG32(mmVCE_LMI_VCPU_CACHE_40BIT_BAR1, (adev->vce.gpu_addr >> 8)); vce 543 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c WREG32(mmVCE_LMI_VCPU_CACHE_40BIT_BAR2, (adev->vce.gpu_addr >> 8)); vce 545 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c WREG32(mmVCE_LMI_VCPU_CACHE_40BIT_BAR, (adev->vce.gpu_addr >> 8)); vce 580 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c mask |= (adev->vce.harvest_config & AMDGPU_VCE_HARVEST_VCE0) ? 0 : SRBM_STATUS2__VCE0_BUSY_MASK; vce 581 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c mask |= (adev->vce.harvest_config & AMDGPU_VCE_HARVEST_VCE1) ? 0 : SRBM_STATUS2__VCE1_BUSY_MASK; vce 637 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c adev->vce.srbm_soft_reset = srbm_soft_reset; vce 640 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c adev->vce.srbm_soft_reset = 0; vce 650 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c if (!adev->vce.srbm_soft_reset) vce 652 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c srbm_soft_reset = adev->vce.srbm_soft_reset; vce 680 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c if (!adev->vce.srbm_soft_reset) vce 693 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c if (!adev->vce.srbm_soft_reset) vce 727 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c amdgpu_fence_process(&adev->vce.ring[entry->src_data[0]]); vce 751 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c if (adev->vce.harvest_config & (1 << i)) vce 948 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c for (i = 0; i < adev->vce.num_rings; i++) { vce 949 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c adev->vce.ring[i].funcs = &vce_v3_0_ring_vm_funcs; vce 950 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c adev->vce.ring[i].me = i; vce 954 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c for (i = 0; i < adev->vce.num_rings; i++) { vce 955 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c adev->vce.ring[i].funcs = &vce_v3_0_ring_phys_funcs; vce 956 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c adev->vce.ring[i].me = i; vce 969 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c adev->vce.irq.num_types = 1; vce 970 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c adev->vce.irq.funcs = &vce_v3_0_irq_funcs; vce 178 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c WDOORBELL32(adev->vce.ring[0].doorbell_index, 0); vce 179 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c adev->wb.wb[adev->vce.ring[0].wptr_offs] = 0; vce 180 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c adev->vce.ring[0].wptr = 0; vce 181 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c adev->vce.ring[0].wptr_old = 0; vce 232 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c ring = &adev->vce.ring[0]; vce 262 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c adev->vce.gpu_addr >> 8); vce 265 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c (adev->vce.gpu_addr >> 40) & 0xff); vce 272 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c adev->vce.gpu_addr >> 8); vce 275 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c (adev->vce.gpu_addr >> 40) & 0xff); vce 278 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c adev->vce.gpu_addr >> 8); vce 281 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c (adev->vce.gpu_addr >> 40) & 0xff); vce 340 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c ring = &adev->vce.ring[0]; vce 348 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c ring = &adev->vce.ring[1]; vce 356 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c ring = &adev->vce.ring[2]; vce 414 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c adev->vce.num_rings = 1; vce 416 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c adev->vce.num_rings = 3; vce 432 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_VCE0, 167, &adev->vce.irq); vce 446 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c unsigned size = amdgpu_bo_size(adev->vce.vcpu_bo); vce 448 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c adev->vce.saved_bo = kvmalloc(size, GFP_KERNEL); vce 449 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c if (!adev->vce.saved_bo) vce 452 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c hdr = (const struct common_firmware_header *)adev->vce.fw->data; vce 454 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c adev->firmware.ucode[AMDGPU_UCODE_ID_VCE].fw = adev->vce.fw; vce 464 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c for (i = 0; i < adev->vce.num_rings; i++) { vce 465 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c ring = &adev->vce.ring[i]; vce 479 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c r = amdgpu_ring_init(adev, ring, 512, &adev->vce.irq, 0); vce 505 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c kvfree(adev->vce.saved_bo); vce 506 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c adev->vce.saved_bo = NULL; vce 528 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c for (i = 0; i < adev->vce.num_rings; i++) { vce 529 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c r = amdgpu_ring_test_helper(&adev->vce.ring[i]); vce 552 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c for (i = 0; i < adev->vce.num_rings; i++) vce 553 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c adev->vce.ring[i].sched.ready = false; vce 563 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c if (adev->vce.vcpu_bo == NULL) vce 567 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c unsigned size = amdgpu_bo_size(adev->vce.vcpu_bo); vce 568 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c void *ptr = adev->vce.cpu_addr; vce 570 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c memcpy_fromio(adev->vce.saved_bo, ptr, size); vce 585 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c if (adev->vce.vcpu_bo == NULL) vce 589 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c unsigned size = amdgpu_bo_size(adev->vce.vcpu_bo); vce 590 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c void *ptr = adev->vce.cpu_addr; vce 592 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c memcpy_toio(ptr, adev->vce.saved_bo, size); vce 630 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c (adev->vce.gpu_addr >> 8)); vce 632 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c (adev->vce.gpu_addr >> 40) & 0xff); vce 639 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_VCPU_CACHE_40BIT_BAR1), (adev->vce.gpu_addr >> 8)); vce 640 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_VCPU_CACHE_64BIT_BAR1), (adev->vce.gpu_addr >> 40) & 0xff); vce 646 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_VCPU_CACHE_40BIT_BAR2), (adev->vce.gpu_addr >> 8)); vce 647 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_VCPU_CACHE_64BIT_BAR2), (adev->vce.gpu_addr >> 40) & 0xff); vce 672 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c mask |= (adev->vce.harvest_config & AMDGPU_VCE_HARVEST_VCE0) ? 0 : SRBM_STATUS2__VCE0_BUSY_MASK; vce 673 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c mask |= (adev->vce.harvest_config & AMDGPU_VCE_HARVEST_VCE1) ? 0 : SRBM_STATUS2__VCE1_BUSY_MASK; vce 729 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c adev->vce.srbm_soft_reset = srbm_soft_reset; vce 732 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c adev->vce.srbm_soft_reset = 0; vce 742 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c if (!adev->vce.srbm_soft_reset) vce 744 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c srbm_soft_reset = adev->vce.srbm_soft_reset; vce 772 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c if (!adev->vce.srbm_soft_reset) vce 785 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c if (!adev->vce.srbm_soft_reset) vce 904 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c if (adev->vce.harvest_config & (1 << i)) vce 1036 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c amdgpu_fence_process(&adev->vce.ring[entry->src_data[0]]); vce 1104 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c for (i = 0; i < adev->vce.num_rings; i++) { vce 1105 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c adev->vce.ring[i].funcs = &vce_v4_0_ring_vm_funcs; vce 1106 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c adev->vce.ring[i].me = i; vce 1118 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c adev->vce.irq.num_types = 1; vce 1119 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c adev->vce.irq.funcs = &vce_v4_0_irq_funcs; vce 111 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.h uint32_t vce : 1; vce 134 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h uint32_t vce : 1; vce 2384 drivers/gpu/drm/radeon/radeon.h struct radeon_vce vce; vce 304 drivers/gpu/drm/radeon/radeon_drv.c MODULE_PARM_DESC(vce, "vce enable/disable vce support (1 = enable, 0 = disable)"); vce 305 drivers/gpu/drm/radeon/radeon_drv.c module_param_named(vce, radeon_vce, int, 0444); vce 525 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->vce.fw_version; vce 528 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->vce.fb_version; vce 65 drivers/gpu/drm/radeon/radeon_vce.c INIT_DELAYED_WORK(&rdev->vce.idle_work, radeon_vce_idle_work_handler); vce 122 drivers/gpu/drm/radeon/radeon_vce.c if (sscanf(c, "%2u]", &rdev->vce.fb_version) != 1) vce 126 drivers/gpu/drm/radeon/radeon_vce.c start, mid, end, rdev->vce.fb_version); vce 128 drivers/gpu/drm/radeon/radeon_vce.c rdev->vce.fw_version = (start << 24) | (mid << 16) | (end << 8); vce 131 drivers/gpu/drm/radeon/radeon_vce.c if ((rdev->vce.fw_version != ((40 << 24) | (2 << 16) | (2 << 8))) && vce 132 drivers/gpu/drm/radeon/radeon_vce.c (rdev->vce.fw_version != ((50 << 24) | (0 << 16) | (1 << 8))) && vce 133 drivers/gpu/drm/radeon/radeon_vce.c (rdev->vce.fw_version != ((50 << 24) | (1 << 16) | (2 << 8)))) vce 144 drivers/gpu/drm/radeon/radeon_vce.c &rdev->vce.vcpu_bo); vce 150 drivers/gpu/drm/radeon/radeon_vce.c r = radeon_bo_reserve(rdev->vce.vcpu_bo, false); vce 152 drivers/gpu/drm/radeon/radeon_vce.c radeon_bo_unref(&rdev->vce.vcpu_bo); vce 157 drivers/gpu/drm/radeon/radeon_vce.c r = radeon_bo_pin(rdev->vce.vcpu_bo, RADEON_GEM_DOMAIN_VRAM, vce 158 drivers/gpu/drm/radeon/radeon_vce.c &rdev->vce.gpu_addr); vce 159 drivers/gpu/drm/radeon/radeon_vce.c radeon_bo_unreserve(rdev->vce.vcpu_bo); vce 161 drivers/gpu/drm/radeon/radeon_vce.c radeon_bo_unref(&rdev->vce.vcpu_bo); vce 167 drivers/gpu/drm/radeon/radeon_vce.c atomic_set(&rdev->vce.handles[i], 0); vce 168 drivers/gpu/drm/radeon/radeon_vce.c rdev->vce.filp[i] = NULL; vce 183 drivers/gpu/drm/radeon/radeon_vce.c if (rdev->vce.vcpu_bo == NULL) vce 186 drivers/gpu/drm/radeon/radeon_vce.c radeon_bo_unref(&rdev->vce.vcpu_bo); vce 201 drivers/gpu/drm/radeon/radeon_vce.c if (rdev->vce.vcpu_bo == NULL) vce 205 drivers/gpu/drm/radeon/radeon_vce.c if (atomic_read(&rdev->vce.handles[i])) vce 226 drivers/gpu/drm/radeon/radeon_vce.c if (rdev->vce.vcpu_bo == NULL) vce 229 drivers/gpu/drm/radeon/radeon_vce.c r = radeon_bo_reserve(rdev->vce.vcpu_bo, false); vce 235 drivers/gpu/drm/radeon/radeon_vce.c r = radeon_bo_kmap(rdev->vce.vcpu_bo, &cpu_addr); vce 237 drivers/gpu/drm/radeon/radeon_vce.c radeon_bo_unreserve(rdev->vce.vcpu_bo); vce 242 drivers/gpu/drm/radeon/radeon_vce.c memset(cpu_addr, 0, radeon_bo_size(rdev->vce.vcpu_bo)); vce 248 drivers/gpu/drm/radeon/radeon_vce.c radeon_bo_kunmap(rdev->vce.vcpu_bo); vce 250 drivers/gpu/drm/radeon/radeon_vce.c radeon_bo_unreserve(rdev->vce.vcpu_bo); vce 265 drivers/gpu/drm/radeon/radeon_vce.c container_of(work, struct radeon_device, vce.idle_work.work); vce 275 drivers/gpu/drm/radeon/radeon_vce.c schedule_delayed_work(&rdev->vce.idle_work, vce 290 drivers/gpu/drm/radeon/radeon_vce.c bool set_clocks = !cancel_delayed_work_sync(&rdev->vce.idle_work); vce 291 drivers/gpu/drm/radeon/radeon_vce.c set_clocks &= schedule_delayed_work(&rdev->vce.idle_work, vce 320 drivers/gpu/drm/radeon/radeon_vce.c uint32_t handle = atomic_read(&rdev->vce.handles[i]); vce 321 drivers/gpu/drm/radeon/radeon_vce.c if (!handle || rdev->vce.filp[i] != filp) vce 331 drivers/gpu/drm/radeon/radeon_vce.c rdev->vce.filp[i] = NULL; vce 332 drivers/gpu/drm/radeon/radeon_vce.c atomic_set(&rdev->vce.handles[i], 0); vce 528 drivers/gpu/drm/radeon/radeon_vce.c if (atomic_read(&p->rdev->vce.handles[i]) == handle) { vce 529 drivers/gpu/drm/radeon/radeon_vce.c if (p->rdev->vce.filp[i] != p->filp) { vce 539 drivers/gpu/drm/radeon/radeon_vce.c if (!atomic_cmpxchg(&p->rdev->vce.handles[i], 0, handle)) { vce 540 drivers/gpu/drm/radeon/radeon_vce.c p->rdev->vce.filp[i] = p->filp; vce 541 drivers/gpu/drm/radeon/radeon_vce.c p->rdev->vce.img_size[i] = 0; vce 588 drivers/gpu/drm/radeon/radeon_vce.c size = &p->rdev->vce.img_size[session_idx]; vce 680 drivers/gpu/drm/radeon/radeon_vce.c atomic_cmpxchg(&p->rdev->vce.handles[i], handle, 0); vce 205 drivers/gpu/drm/radeon/vce_v1_0.c rdev->vce.keyselect = le32_to_cpu(sign->val[i].keyselect); vce 218 drivers/gpu/drm/radeon/vce_v1_0.c uint64_t addr = rdev->vce.gpu_addr; vce 254 drivers/gpu/drm/radeon/vce_v1_0.c WREG32(VCE_LMI_FW_START_KEYSEL, rdev->vce.keyselect); vce 159 drivers/gpu/drm/radeon/vce_v2_0.c uint64_t addr = rdev->vce.gpu_addr; vce 3506 drivers/scsi/qla2xxx/qla_iocb.c qla25xx_ctrlvp_iocb(srb_t *sp, struct vp_ctrl_entry_24xx *vce) vce 3510 drivers/scsi/qla2xxx/qla_iocb.c vce->entry_type = VP_CTRL_IOCB_TYPE; vce 3511 drivers/scsi/qla2xxx/qla_iocb.c vce->handle = sp->handle; vce 3512 drivers/scsi/qla2xxx/qla_iocb.c vce->entry_count = 1; vce 3513 drivers/scsi/qla2xxx/qla_iocb.c vce->command = cpu_to_le16(sp->u.iocb_cmd.u.ctrlvp.cmd); vce 3514 drivers/scsi/qla2xxx/qla_iocb.c vce->vp_count = cpu_to_le16(1); vce 3522 drivers/scsi/qla2xxx/qla_iocb.c vce->vp_idx_map[map] |= 1 << pos; vce 1960 drivers/scsi/qla2xxx/qla_isr.c struct vp_ctrl_entry_24xx *vce) vce 1966 drivers/scsi/qla2xxx/qla_isr.c sp = qla2x00_get_sp_from_handle(vha, func, req, vce); vce 1970 drivers/scsi/qla2xxx/qla_isr.c if (vce->entry_status != 0) { vce 1973 drivers/scsi/qla2xxx/qla_isr.c sp->name, vce->entry_status); vce 1975 drivers/scsi/qla2xxx/qla_isr.c } else if (vce->comp_status != cpu_to_le16(CS_COMPLETE)) { vce 1978 drivers/scsi/qla2xxx/qla_isr.c sp->name, le16_to_cpu(vce->comp_status), vce 1979 drivers/scsi/qla2xxx/qla_isr.c le16_to_cpu(vce->vp_idx_failed));