vc5               141 drivers/clk/clk-versaclock5.c 	struct vc5_driver_data	*vc5;
vc5               216 drivers/clk/clk-versaclock5.c 	struct vc5_driver_data *vc5 =
vc5               221 drivers/clk/clk-versaclock5.c 	regmap_read(vc5->regmap, VC5_PRIM_SRC_SHDN, &src);
vc5               230 drivers/clk/clk-versaclock5.c 	dev_warn(&vc5->client->dev,
vc5               237 drivers/clk/clk-versaclock5.c 	struct vc5_driver_data *vc5 =
vc5               242 drivers/clk/clk-versaclock5.c 	if ((index > 1) || !vc5->clk_mux_ins)
vc5               245 drivers/clk/clk-versaclock5.c 	if (vc5->clk_mux_ins == (VC5_MUX_IN_CLKIN | VC5_MUX_IN_XIN)) {
vc5               254 drivers/clk/clk-versaclock5.c 		if (vc5->clk_mux_ins == VC5_MUX_IN_XIN)
vc5               256 drivers/clk/clk-versaclock5.c 		else if (vc5->clk_mux_ins == VC5_MUX_IN_CLKIN)
vc5               262 drivers/clk/clk-versaclock5.c 	return regmap_update_bits(vc5->regmap, VC5_PRIM_SRC_SHDN, mask, src);
vc5               273 drivers/clk/clk-versaclock5.c 	struct vc5_driver_data *vc5 =
vc5               277 drivers/clk/clk-versaclock5.c 	regmap_read(vc5->regmap, VC5_PRIM_SRC_SHDN, &premul);
vc5               296 drivers/clk/clk-versaclock5.c 	struct vc5_driver_data *vc5 =
vc5               305 drivers/clk/clk-versaclock5.c 	regmap_update_bits(vc5->regmap, VC5_PRIM_SRC_SHDN,
vc5               321 drivers/clk/clk-versaclock5.c 	struct vc5_driver_data *vc5 =
vc5               325 drivers/clk/clk-versaclock5.c 	regmap_read(vc5->regmap, VC5_VCO_CTRL_AND_PREDIV, &prediv);
vc5               331 drivers/clk/clk-versaclock5.c 	regmap_read(vc5->regmap, VC5_REF_DIVIDER, &div);
vc5               363 drivers/clk/clk-versaclock5.c 	struct vc5_driver_data *vc5 =
vc5               370 drivers/clk/clk-versaclock5.c 		regmap_update_bits(vc5->regmap, VC5_VCO_CTRL_AND_PREDIV,
vc5               373 drivers/clk/clk-versaclock5.c 		regmap_update_bits(vc5->regmap, VC5_REF_DIVIDER, 0xff, 0x00);
vc5               385 drivers/clk/clk-versaclock5.c 	regmap_update_bits(vc5->regmap, VC5_REF_DIVIDER, 0xff, div);
vc5               386 drivers/clk/clk-versaclock5.c 	regmap_update_bits(vc5->regmap, VC5_VCO_CTRL_AND_PREDIV,
vc5               405 drivers/clk/clk-versaclock5.c 	struct vc5_driver_data *vc5 = hwdata->vc5;
vc5               409 drivers/clk/clk-versaclock5.c 	regmap_bulk_read(vc5->regmap, VC5_FEEDBACK_INT_DIV, fb, 5);
vc5               450 drivers/clk/clk-versaclock5.c 	struct vc5_driver_data *vc5 = hwdata->vc5;
vc5               459 drivers/clk/clk-versaclock5.c 	return regmap_bulk_write(vc5->regmap, VC5_FEEDBACK_INT_DIV, fb, 5);
vc5               472 drivers/clk/clk-versaclock5.c 	struct vc5_driver_data *vc5 = hwdata->vc5;
vc5               479 drivers/clk/clk-versaclock5.c 	regmap_bulk_read(vc5->regmap, VC5_OUT_DIV_INT(hwdata->num, 0),
vc5               481 drivers/clk/clk-versaclock5.c 	regmap_bulk_read(vc5->regmap, VC5_OUT_DIV_FRAC(hwdata->num, 0),
vc5               532 drivers/clk/clk-versaclock5.c 	struct vc5_driver_data *vc5 = hwdata->vc5;
vc5               542 drivers/clk/clk-versaclock5.c 	regmap_bulk_write(vc5->regmap, VC5_OUT_DIV_FRAC(hwdata->num, 0),
vc5               551 drivers/clk/clk-versaclock5.c 	regmap_update_bits(vc5->regmap, VC5_GLOBAL_REGISTER,
vc5               553 drivers/clk/clk-versaclock5.c 	regmap_update_bits(vc5->regmap, VC5_GLOBAL_REGISTER,
vc5               568 drivers/clk/clk-versaclock5.c 	struct vc5_driver_data *vc5 = hwdata->vc5;
vc5               579 drivers/clk/clk-versaclock5.c 	regmap_read(vc5->regmap, VC5_OUT_DIV_CONTROL(hwdata->num), &src);
vc5               582 drivers/clk/clk-versaclock5.c 		ret = regmap_update_bits(vc5->regmap,
vc5               590 drivers/clk/clk-versaclock5.c 	regmap_update_bits(vc5->regmap, VC5_CLK_OUTPUT_CFG(hwdata->num, 1),
vc5               599 drivers/clk/clk-versaclock5.c 	struct vc5_driver_data *vc5 = hwdata->vc5;
vc5               602 drivers/clk/clk-versaclock5.c 	regmap_update_bits(vc5->regmap, VC5_CLK_OUTPUT_CFG(hwdata->num, 1),
vc5               609 drivers/clk/clk-versaclock5.c 	struct vc5_driver_data *vc5 = hwdata->vc5;
vc5               619 drivers/clk/clk-versaclock5.c 	regmap_read(vc5->regmap, VC5_OUT_DIV_CONTROL(hwdata->num), &src);
vc5               631 drivers/clk/clk-versaclock5.c 	dev_warn(&vc5->client->dev,
vc5               639 drivers/clk/clk-versaclock5.c 	struct vc5_driver_data *vc5 = hwdata->vc5;
vc5               653 drivers/clk/clk-versaclock5.c 	return regmap_update_bits(vc5->regmap, VC5_OUT_DIV_CONTROL(hwdata->num),
vc5               667 drivers/clk/clk-versaclock5.c 	struct vc5_driver_data *vc5 = data;
vc5               670 drivers/clk/clk-versaclock5.c 	if (idx >= vc5->chip_info->clk_out_cnt)
vc5               673 drivers/clk/clk-versaclock5.c 	return &vc5->clk_out[idx].hw;
vc5               696 drivers/clk/clk-versaclock5.c 	struct vc5_driver_data *vc5;
vc5               702 drivers/clk/clk-versaclock5.c 	vc5 = devm_kzalloc(&client->dev, sizeof(*vc5), GFP_KERNEL);
vc5               703 drivers/clk/clk-versaclock5.c 	if (vc5 == NULL)
vc5               706 drivers/clk/clk-versaclock5.c 	i2c_set_clientdata(client, vc5);
vc5               707 drivers/clk/clk-versaclock5.c 	vc5->client = client;
vc5               708 drivers/clk/clk-versaclock5.c 	vc5->chip_info = of_device_get_match_data(&client->dev);
vc5               710 drivers/clk/clk-versaclock5.c 	vc5->pin_xin = devm_clk_get(&client->dev, "xin");
vc5               711 drivers/clk/clk-versaclock5.c 	if (PTR_ERR(vc5->pin_xin) == -EPROBE_DEFER)
vc5               714 drivers/clk/clk-versaclock5.c 	vc5->pin_clkin = devm_clk_get(&client->dev, "clkin");
vc5               715 drivers/clk/clk-versaclock5.c 	if (PTR_ERR(vc5->pin_clkin) == -EPROBE_DEFER)
vc5               718 drivers/clk/clk-versaclock5.c 	vc5->regmap = devm_regmap_init_i2c(client, &vc5_regmap_config);
vc5               719 drivers/clk/clk-versaclock5.c 	if (IS_ERR(vc5->regmap)) {
vc5               721 drivers/clk/clk-versaclock5.c 		return PTR_ERR(vc5->regmap);
vc5               727 drivers/clk/clk-versaclock5.c 	if (!IS_ERR(vc5->pin_xin)) {
vc5               728 drivers/clk/clk-versaclock5.c 		vc5->clk_mux_ins |= VC5_MUX_IN_XIN;
vc5               729 drivers/clk/clk-versaclock5.c 		parent_names[init.num_parents++] = __clk_get_name(vc5->pin_xin);
vc5               730 drivers/clk/clk-versaclock5.c 	} else if (vc5->chip_info->flags & VC5_HAS_INTERNAL_XTAL) {
vc5               731 drivers/clk/clk-versaclock5.c 		vc5->pin_xin = clk_register_fixed_rate(&client->dev,
vc5               734 drivers/clk/clk-versaclock5.c 		if (IS_ERR(vc5->pin_xin))
vc5               735 drivers/clk/clk-versaclock5.c 			return PTR_ERR(vc5->pin_xin);
vc5               736 drivers/clk/clk-versaclock5.c 		vc5->clk_mux_ins |= VC5_MUX_IN_XIN;
vc5               737 drivers/clk/clk-versaclock5.c 		parent_names[init.num_parents++] = __clk_get_name(vc5->pin_xin);
vc5               740 drivers/clk/clk-versaclock5.c 	if (!IS_ERR(vc5->pin_clkin)) {
vc5               741 drivers/clk/clk-versaclock5.c 		vc5->clk_mux_ins |= VC5_MUX_IN_CLKIN;
vc5               743 drivers/clk/clk-versaclock5.c 			__clk_get_name(vc5->pin_clkin);
vc5               755 drivers/clk/clk-versaclock5.c 	vc5->clk_mux.init = &init;
vc5               756 drivers/clk/clk-versaclock5.c 	ret = devm_clk_hw_register(&client->dev, &vc5->clk_mux);
vc5               762 drivers/clk/clk-versaclock5.c 	if (vc5->chip_info->flags & VC5_HAS_PFD_FREQ_DBL) {
vc5               770 drivers/clk/clk-versaclock5.c 		vc5->clk_mul.init = &init;
vc5               771 drivers/clk/clk-versaclock5.c 		ret = devm_clk_hw_register(&client->dev, &vc5->clk_mul);
vc5               784 drivers/clk/clk-versaclock5.c 	if (vc5->chip_info->flags & VC5_HAS_PFD_FREQ_DBL)
vc5               789 drivers/clk/clk-versaclock5.c 	vc5->clk_pfd.init = &init;
vc5               790 drivers/clk/clk-versaclock5.c 	ret = devm_clk_hw_register(&client->dev, &vc5->clk_pfd);
vc5               803 drivers/clk/clk-versaclock5.c 	vc5->clk_pll.num = 0;
vc5               804 drivers/clk/clk-versaclock5.c 	vc5->clk_pll.vc5 = vc5;
vc5               805 drivers/clk/clk-versaclock5.c 	vc5->clk_pll.hw.init = &init;
vc5               806 drivers/clk/clk-versaclock5.c 	ret = devm_clk_hw_register(&client->dev, &vc5->clk_pll.hw);
vc5               813 drivers/clk/clk-versaclock5.c 	for (n = 0; n < vc5->chip_info->clk_fod_cnt; n++) {
vc5               814 drivers/clk/clk-versaclock5.c 		idx = vc5_map_index_to_output(vc5->chip_info->model, n);
vc5               821 drivers/clk/clk-versaclock5.c 		vc5->clk_fod[n].num = idx;
vc5               822 drivers/clk/clk-versaclock5.c 		vc5->clk_fod[n].vc5 = vc5;
vc5               823 drivers/clk/clk-versaclock5.c 		vc5->clk_fod[n].hw.init = &init;
vc5               824 drivers/clk/clk-versaclock5.c 		ret = devm_clk_hw_register(&client->dev, &vc5->clk_fod[n].hw);
vc5               839 drivers/clk/clk-versaclock5.c 	vc5->clk_out[0].num = idx;
vc5               840 drivers/clk/clk-versaclock5.c 	vc5->clk_out[0].vc5 = vc5;
vc5               841 drivers/clk/clk-versaclock5.c 	vc5->clk_out[0].hw.init = &init;
vc5               842 drivers/clk/clk-versaclock5.c 	ret = devm_clk_hw_register(&client->dev, &vc5->clk_out[0].hw);
vc5               850 drivers/clk/clk-versaclock5.c 	for (n = 1; n < vc5->chip_info->clk_out_cnt; n++) {
vc5               851 drivers/clk/clk-versaclock5.c 		idx = vc5_map_index_to_output(vc5->chip_info->model, n - 1);
vc5               864 drivers/clk/clk-versaclock5.c 		vc5->clk_out[n].num = idx;
vc5               865 drivers/clk/clk-versaclock5.c 		vc5->clk_out[n].vc5 = vc5;
vc5               866 drivers/clk/clk-versaclock5.c 		vc5->clk_out[n].hw.init = &init;
vc5               868 drivers/clk/clk-versaclock5.c 					   &vc5->clk_out[n].hw);
vc5               876 drivers/clk/clk-versaclock5.c 	ret = of_clk_add_hw_provider(client->dev.of_node, vc5_of_clk_get, vc5);
vc5               885 drivers/clk/clk-versaclock5.c 	if (vc5->chip_info->flags & VC5_HAS_INTERNAL_XTAL)
vc5               886 drivers/clk/clk-versaclock5.c 		clk_unregister_fixed_rate(vc5->pin_xin);
vc5               892 drivers/clk/clk-versaclock5.c 	struct vc5_driver_data *vc5 = i2c_get_clientdata(client);
vc5               896 drivers/clk/clk-versaclock5.c 	if (vc5->chip_info->flags & VC5_HAS_INTERNAL_XTAL)
vc5               897 drivers/clk/clk-versaclock5.c 		clk_unregister_fixed_rate(vc5->pin_xin);
vc5               904 drivers/clk/clk-versaclock5.c 	struct vc5_driver_data *vc5 = dev_get_drvdata(dev);
vc5               906 drivers/clk/clk-versaclock5.c 	regcache_cache_only(vc5->regmap, true);
vc5               907 drivers/clk/clk-versaclock5.c 	regcache_mark_dirty(vc5->regmap);
vc5               914 drivers/clk/clk-versaclock5.c 	struct vc5_driver_data *vc5 = dev_get_drvdata(dev);
vc5               917 drivers/clk/clk-versaclock5.c 	regcache_cache_only(vc5->regmap, false);
vc5               918 drivers/clk/clk-versaclock5.c 	ret = regcache_sync(vc5->regmap);
vc5               357 drivers/net/dsa/b53/b53_common.c 	u8 mgmt, vc0, vc1, vc4 = 0, vc5;
vc5               365 drivers/net/dsa/b53/b53_common.c 		b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5_25, &vc5);
vc5               368 drivers/net/dsa/b53/b53_common.c 		b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5_63XX, &vc5);
vc5               371 drivers/net/dsa/b53/b53_common.c 		b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5, &vc5);
vc5               382 drivers/net/dsa/b53/b53_common.c 			vc5 |= VC5_DROP_VTABLE_MISS;
vc5               385 drivers/net/dsa/b53/b53_common.c 			vc5 &= ~VC5_DROP_VTABLE_MISS;
vc5               398 drivers/net/dsa/b53/b53_common.c 		vc5 &= ~VC5_DROP_VTABLE_MISS;
vc5               410 drivers/net/dsa/b53/b53_common.c 		vc5 &= ~VC5_VID_FFF_EN;
vc5               424 drivers/net/dsa/b53/b53_common.c 		b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5_25, vc5);
vc5               428 drivers/net/dsa/b53/b53_common.c 		b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5_63XX, vc5);
vc5               432 drivers/net/dsa/b53/b53_common.c 		b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5, vc5);