vbva              124 drivers/gpu/drm/vboxvideo/vbox_main.c 	struct vbva_buffer *vbva;
vbva              147 drivers/gpu/drm/vboxvideo/vbox_main.c 		vbva = (void __force *)vbox->vbva_buffers +
vbva              150 drivers/gpu/drm/vboxvideo/vbox_main.c 				 vbox->guest_pool, vbva, i)) {
vbva               27 drivers/gpu/drm/vboxvideo/vboxvideo_guest.h 	struct vbva_buffer *vbva;
vbva               41 drivers/gpu/drm/vboxvideo/vboxvideo_guest.h 		 struct vbva_buffer *vbva, s32 screen);
vbva               22 drivers/gpu/drm/vboxvideo/vbva_base.c static u32 vbva_buffer_available(const struct vbva_buffer *vbva)
vbva               24 drivers/gpu/drm/vboxvideo/vbva_base.c 	s32 diff = vbva->data_offset - vbva->free_offset;
vbva               26 drivers/gpu/drm/vboxvideo/vbva_base.c 	return diff > 0 ? diff : vbva->data_len + diff;
vbva               32 drivers/gpu/drm/vboxvideo/vbva_base.c 	struct vbva_buffer *vbva = vbva_ctx->vbva;
vbva               33 drivers/gpu/drm/vboxvideo/vbva_base.c 	u32 bytes_till_boundary = vbva->data_len - offset;
vbva               34 drivers/gpu/drm/vboxvideo/vbva_base.c 	u8 *dst = &vbva->data[offset];
vbva               43 drivers/gpu/drm/vboxvideo/vbva_base.c 		memcpy(&vbva->data[0], (u8 *)p + bytes_till_boundary, diff);
vbva               65 drivers/gpu/drm/vboxvideo/vbva_base.c 	struct vbva_buffer *vbva;
vbva               68 drivers/gpu/drm/vboxvideo/vbva_base.c 	vbva = vbva_ctx->vbva;
vbva               71 drivers/gpu/drm/vboxvideo/vbva_base.c 	if (!vbva || vbva_ctx->buffer_overflow ||
vbva               75 drivers/gpu/drm/vboxvideo/vbva_base.c 	available = vbva_buffer_available(vbva);
vbva               82 drivers/gpu/drm/vboxvideo/vbva_base.c 			available = vbva_buffer_available(vbva);
vbva               86 drivers/gpu/drm/vboxvideo/vbva_base.c 			if (WARN_ON(available <= vbva->partial_write_tresh)) {
vbva               90 drivers/gpu/drm/vboxvideo/vbva_base.c 			chunk = available - vbva->partial_write_tresh;
vbva               94 drivers/gpu/drm/vboxvideo/vbva_base.c 					  vbva->free_offset);
vbva               96 drivers/gpu/drm/vboxvideo/vbva_base.c 		vbva->free_offset = (vbva->free_offset + chunk) %
vbva               97 drivers/gpu/drm/vboxvideo/vbva_base.c 				    vbva->data_len;
vbva              138 drivers/gpu/drm/vboxvideo/vbva_base.c 		 struct vbva_buffer *vbva, s32 screen)
vbva              142 drivers/gpu/drm/vboxvideo/vbva_base.c 	memset(vbva, 0, sizeof(*vbva));
vbva              143 drivers/gpu/drm/vboxvideo/vbva_base.c 	vbva->partial_write_tresh = 256;
vbva              144 drivers/gpu/drm/vboxvideo/vbva_base.c 	vbva->data_len = vbva_ctx->buffer_length - sizeof(struct vbva_buffer);
vbva              145 drivers/gpu/drm/vboxvideo/vbva_base.c 	vbva_ctx->vbva = vbva;
vbva              159 drivers/gpu/drm/vboxvideo/vbva_base.c 	vbva_ctx->vbva = NULL;
vbva              170 drivers/gpu/drm/vboxvideo/vbva_base.c 	if (!vbva_ctx->vbva ||
vbva              171 drivers/gpu/drm/vboxvideo/vbva_base.c 	    !(vbva_ctx->vbva->host_flags.host_events & VBVA_F_MODE_ENABLED))
vbva              176 drivers/gpu/drm/vboxvideo/vbva_base.c 	next = (vbva_ctx->vbva->record_free_index + 1) % VBVA_MAX_RECORDS;
vbva              179 drivers/gpu/drm/vboxvideo/vbva_base.c 	if (next == vbva_ctx->vbva->record_first_index)
vbva              183 drivers/gpu/drm/vboxvideo/vbva_base.c 	if (next == vbva_ctx->vbva->record_first_index)
vbva              186 drivers/gpu/drm/vboxvideo/vbva_base.c 	record = &vbva_ctx->vbva->records[vbva_ctx->vbva->record_free_index];
vbva              188 drivers/gpu/drm/vboxvideo/vbva_base.c 	vbva_ctx->vbva->record_free_index = next;
vbva              199 drivers/gpu/drm/vboxvideo/vbva_base.c 	WARN_ON(!vbva_ctx->vbva || !record ||