valid_sclk_values  218 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h 	struct amdgpu_clock_array valid_sclk_values;
valid_sclk_values 3246 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	return btc_find_valid_clock(&adev->pm.dpm.dyn_state.valid_sclk_values,
valid_sclk_values 7451 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	adev->pm.dpm.dyn_state.valid_sclk_values.count = 0;
valid_sclk_values 7452 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	adev->pm.dpm.dyn_state.valid_sclk_values.values = NULL;
valid_sclk_values  840 drivers/gpu/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c 		result = get_valid_clk(hwmgr, &pp_table_information->valid_sclk_values,
valid_sclk_values 1123 drivers/gpu/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c 	kfree(pp_table_information->valid_sclk_values);
valid_sclk_values 1124 drivers/gpu/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c 	pp_table_information->valid_sclk_values = NULL;
valid_sclk_values 1370 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c 				&hwmgr->dyn_state.valid_sclk_values,
valid_sclk_values 1691 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c 	kfree(hwmgr->dyn_state.valid_sclk_values);
valid_sclk_values 1692 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c 	hwmgr->dyn_state.valid_sclk_values = NULL;
valid_sclk_values 1043 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c 				&pp_table_info->valid_sclk_values,
valid_sclk_values 1245 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c 	kfree(pp_table_info->valid_sclk_values);
valid_sclk_values 1246 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c 	pp_table_info->valid_sclk_values = NULL;
valid_sclk_values  527 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	struct phm_clock_array *valid_sclk_values;
valid_sclk_values  563 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	struct phm_clock_array *valid_sclk_values;
valid_sclk_values  626 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	struct phm_clock_array                    *valid_sclk_values;
valid_sclk_values 1239 drivers/gpu/drm/radeon/btc_dpm.c 	return btc_find_valid_clock(&rdev->pm.dpm.dyn_state.valid_sclk_values,
valid_sclk_values 2704 drivers/gpu/drm/radeon/btc_dpm.c 	rdev->pm.dpm.dyn_state.valid_sclk_values.count = ARRAY_SIZE(btc_valid_sclk);
valid_sclk_values 2705 drivers/gpu/drm/radeon/btc_dpm.c 	rdev->pm.dpm.dyn_state.valid_sclk_values.values = btc_valid_sclk;
valid_sclk_values 5810 drivers/gpu/drm/radeon/ci_dpm.c 	rdev->pm.dpm.dyn_state.valid_sclk_values.count = 0;
valid_sclk_values 5811 drivers/gpu/drm/radeon/ci_dpm.c 	rdev->pm.dpm.dyn_state.valid_sclk_values.values = NULL;
valid_sclk_values 4200 drivers/gpu/drm/radeon/ni_dpm.c 	rdev->pm.dpm.dyn_state.valid_sclk_values.count = ARRAY_SIZE(btc_valid_sclk);
valid_sclk_values 4201 drivers/gpu/drm/radeon/ni_dpm.c 	rdev->pm.dpm.dyn_state.valid_sclk_values.values = btc_valid_sclk;
valid_sclk_values 1479 drivers/gpu/drm/radeon/radeon.h 	struct radeon_clock_array valid_sclk_values;
valid_sclk_values 7061 drivers/gpu/drm/radeon/si_dpm.c 	rdev->pm.dpm.dyn_state.valid_sclk_values.count = 0;
valid_sclk_values 7062 drivers/gpu/drm/radeon/si_dpm.c 	rdev->pm.dpm.dyn_state.valid_sclk_values.values = NULL;