valid_mask 140 arch/alpha/kernel/err_marvel.c marvel_print_po7_uncrr_sym(u64 uncrr_sym, u64 valid_mask) valid_mask 187 arch/alpha/kernel/err_marvel.c uncrr_sym &= valid_mask; valid_mask 189 arch/alpha/kernel/err_marvel.c if (EXTRACT(valid_mask, IO7__PO7_UNCRR_SYM__SYN)) valid_mask 194 arch/alpha/kernel/err_marvel.c if (EXTRACT(valid_mask, IO7__PO7_UNCRR_SYM__ERR_CYC)) valid_mask 255 arch/alpha/kernel/err_marvel.c if (EXTRACT(valid_mask, IO7__PO7_UNCRR_SYM__STRV_VTR)) { valid_mask 517 arch/arm64/kernel/cpufeature.c u64 valid_mask = 0; valid_mask 530 arch/arm64/kernel/cpufeature.c valid_mask |= ftr_mask; valid_mask 541 arch/arm64/kernel/cpufeature.c val &= valid_mask; valid_mask 87 arch/mips/cavium-octeon/executive/cvmx-l2c.c uint32_t valid_mask; valid_mask 89 arch/mips/cavium-octeon/executive/cvmx-l2c.c valid_mask = (0x1 << cvmx_l2c_get_num_assoc()) - 1; valid_mask 91 arch/mips/cavium-octeon/executive/cvmx-l2c.c mask &= valid_mask; valid_mask 94 arch/mips/cavium-octeon/executive/cvmx-l2c.c if (mask == valid_mask && !OCTEON_IS_MODEL(OCTEON_CN63XX)) valid_mask 144 arch/mips/cavium-octeon/executive/cvmx-l2c.c uint32_t valid_mask; valid_mask 146 arch/mips/cavium-octeon/executive/cvmx-l2c.c valid_mask = (0x1 << cvmx_l2c_get_num_assoc()) - 1; valid_mask 147 arch/mips/cavium-octeon/executive/cvmx-l2c.c mask &= valid_mask; valid_mask 150 arch/mips/cavium-octeon/executive/cvmx-l2c.c if (mask == valid_mask && !OCTEON_IS_MODEL(OCTEON_CN63XX)) valid_mask 56 arch/powerpc/perf/isa207-common.c u64 valid_mask = EVENT_VALID_MASK; valid_mask 59 arch/powerpc/perf/isa207-common.c valid_mask = p9_EVENT_VALID_MASK; valid_mask 61 arch/powerpc/perf/isa207-common.c return !(event & ~valid_mask); valid_mask 88 arch/x86/events/amd/ibs.c u64 valid_mask; valid_mask 465 arch/x86/events/amd/ibs.c config &= ~perf_ibs->valid_mask; valid_mask 535 arch/x86/events/amd/ibs.c .valid_mask = IBS_FETCH_VAL, valid_mask 560 arch/x86/events/amd/ibs.c .valid_mask = IBS_OP_VAL, valid_mask 603 arch/x86/events/amd/ibs.c if (!(*buf++ & perf_ibs->valid_mask)) valid_mask 127 arch/x86/events/core.c if (event->attr.config1 & ~er->valid_mask) valid_mask 2611 arch/x86/events/intel/core.c if (config & ~x86_pmu.extra_regs[alt_idx].valid_mask) valid_mask 781 arch/x86/events/intel/uncore_nhmex.c if (event->attr.config1 & ~er->valid_mask) valid_mask 480 arch/x86/events/perf_event.h u64 valid_mask; valid_mask 489 arch/x86/events/perf_event.h .valid_mask = (vm), \ valid_mask 93 drivers/bus/brcmstb_gisb.c u32 valid_mask; valid_mask 180 drivers/bus/brcmstb_gisb.c u32 mask = gdev->valid_mask & masters; valid_mask 361 drivers/bus/brcmstb_gisb.c &gdev->valid_mask)) valid_mask 362 drivers/bus/brcmstb_gisb.c gdev->valid_mask = 0xffffffff; valid_mask 369 drivers/bus/brcmstb_gisb.c if (hweight_long(gdev->valid_mask) == num_masters) { valid_mask 370 drivers/bus/brcmstb_gisb.c first = ffs(gdev->valid_mask) - 1; valid_mask 371 drivers/bus/brcmstb_gisb.c last = fls(gdev->valid_mask) - 1; valid_mask 374 drivers/bus/brcmstb_gisb.c if (!(gdev->valid_mask & BIT(i))) valid_mask 108 drivers/firmware/psci/psci.c const u32 valid_mask = psci_has_ext_power_state() ? valid_mask 112 drivers/firmware/psci/psci.c return !(state & ~valid_mask); valid_mask 688 drivers/gpio/gpio-aspeed.c unsigned long *valid_mask, valid_mask 705 drivers/gpio/gpio-aspeed.c clear_bit(i, valid_mask); valid_mask 321 drivers/gpio/gpio-rcar.c if (chip->valid_mask) valid_mask 322 drivers/gpio/gpio-rcar.c bankmask &= chip->valid_mask[0]; valid_mask 433 drivers/gpio/gpio-stmpe.c unsigned long *valid_mask, valid_mask 445 drivers/gpio/gpio-stmpe.c clear_bit(i, valid_mask); valid_mask 218 drivers/gpio/gpio-tqmx86.c unsigned long *valid_mask, valid_mask 222 drivers/gpio/gpio-tqmx86.c clear_bit(0, valid_mask); valid_mask 223 drivers/gpio/gpio-tqmx86.c clear_bit(1, valid_mask); valid_mask 224 drivers/gpio/gpio-tqmx86.c clear_bit(2, valid_mask); valid_mask 225 drivers/gpio/gpio-tqmx86.c clear_bit(3, valid_mask); valid_mask 789 drivers/gpio/gpiolib-of.c bitmap_clear(chip->valid_mask, start, count); valid_mask 378 drivers/gpio/gpiolib.c gc->valid_mask = gpiochip_allocate_mask(gc); valid_mask 379 drivers/gpio/gpiolib.c if (!gc->valid_mask) valid_mask 389 drivers/gpio/gpiolib.c gc->valid_mask, valid_mask 397 drivers/gpio/gpiolib.c bitmap_free(gpiochip->valid_mask); valid_mask 398 drivers/gpio/gpiolib.c gpiochip->valid_mask = NULL; valid_mask 405 drivers/gpio/gpiolib.c if (likely(!gpiochip->valid_mask)) valid_mask 407 drivers/gpio/gpiolib.c return test_bit(offset, gpiochip->valid_mask); valid_mask 1656 drivers/gpio/gpiolib.c girq->valid_mask = gpiochip_allocate_mask(gc); valid_mask 1657 drivers/gpio/gpiolib.c if (!girq->valid_mask) valid_mask 1660 drivers/gpio/gpiolib.c girq->init_valid_mask(gc, girq->valid_mask, gc->ngpio); valid_mask 1667 drivers/gpio/gpiolib.c bitmap_free(gpiochip->irq.valid_mask); valid_mask 1668 drivers/gpio/gpiolib.c gpiochip->irq.valid_mask = NULL; valid_mask 1677 drivers/gpio/gpiolib.c if (likely(!gpiochip->irq.valid_mask)) valid_mask 1679 drivers/gpio/gpiolib.c return test_bit(offset, gpiochip->irq.valid_mask); valid_mask 275 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c params.flags, params.valid_mask); valid_mask 276 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c params.flags = params.flags & params.valid_mask; valid_mask 38 drivers/gpu/drm/amd/include/amd_acpi.h u32 valid_mask; /* valid flags mask */ valid_mask 829 drivers/gpu/drm/drm_client_modeset.c u64 valid_mask = 0; valid_mask 889 drivers/gpu/drm/drm_client_modeset.c valid_mask |= (1ULL << plane->rotation_property->values[i]); valid_mask 891 drivers/gpu/drm/drm_client_modeset.c if (!(*rotation & valid_mask)) valid_mask 899 drivers/gpu/drm/drm_property.c uint64_t valid_mask = 0; valid_mask 902 drivers/gpu/drm/drm_property.c valid_mask |= (1ULL << property->values[i]); valid_mask 903 drivers/gpu/drm/drm_property.c return !(value & ~valid_mask); valid_mask 59 drivers/gpu/drm/radeon/radeon_acpi.c u32 valid_mask; /* valid flags mask */ valid_mask 282 drivers/gpu/drm/radeon/radeon_acpi.c params.flags, params.valid_mask); valid_mask 283 drivers/gpu/drm/radeon/radeon_acpi.c params.flags = params.flags & params.valid_mask; valid_mask 110 drivers/irqchip/irq-bcm7120-l2.c int irq, u32 *valid_mask) valid_mask 139 drivers/irqchip/irq-bcm7120-l2.c valid_mask[idx] |= l1_data->irq_map_mask[idx]; valid_mask 226 drivers/irqchip/irq-bcm7120-l2.c u32 valid_mask[MAX_WORDS] = { }; valid_mask 251 drivers/irqchip/irq-bcm7120-l2.c ret = bcm7120_l2_intc_init_one(dn, data, irq, valid_mask); valid_mask 284 drivers/irqchip/irq-bcm7120-l2.c gc->unused = 0xffffffff & ~valid_mask[idx]; valid_mask 200 drivers/irqchip/irq-versatile-fpga.c u32 valid_mask; valid_mask 212 drivers/irqchip/irq-versatile-fpga.c if (of_property_read_u32(node, "valid-mask", &valid_mask)) valid_mask 213 drivers/irqchip/irq-versatile-fpga.c valid_mask = 0; valid_mask 225 drivers/irqchip/irq-versatile-fpga.c fpga_irq_init(base, node->name, 0, parent_irq, valid_mask, node); valid_mask 1753 drivers/net/ethernet/qlogic/qlcnic/qlcnic_ethtool.c bool valid_mask = false; valid_mask 1820 drivers/net/ethernet/qlogic/qlcnic/qlcnic_ethtool.c valid_mask = true; valid_mask 1825 drivers/net/ethernet/qlogic/qlcnic/qlcnic_ethtool.c if (valid_mask) { valid_mask 416 drivers/ntb/hw/idt/ntb_hw_idt.c u64 valid_mask, u64 set_bits) valid_mask 421 drivers/ntb/hw/idt/ntb_hw_idt.c if (set_bits & ~(u64)valid_mask) valid_mask 1448 drivers/pinctrl/intel/pinctrl-baytrail.c unsigned long *valid_mask, valid_mask 1487 drivers/pinctrl/intel/pinctrl-baytrail.c clear_bit(i, gc->irq.valid_mask); valid_mask 1539 drivers/pinctrl/intel/pinctrl-cherryview.c unsigned long *valid_mask, valid_mask 1558 drivers/pinctrl/intel/pinctrl-cherryview.c clear_bit(desc->number, valid_mask); valid_mask 597 drivers/pinctrl/qcom/pinctrl-msm.c unsigned long *valid_mask, valid_mask 608 drivers/pinctrl/qcom/pinctrl-msm.c bitmap_fill(valid_mask, ngpios); valid_mask 614 drivers/pinctrl/qcom/pinctrl-msm.c clear_bit(reserved[i], valid_mask); valid_mask 638 drivers/pinctrl/qcom/pinctrl-msm.c bitmap_zero(valid_mask, ngpios); valid_mask 640 drivers/pinctrl/qcom/pinctrl-msm.c set_bit(tmp[i], valid_mask); valid_mask 165 drivers/platform/x86/intel_int0002_vgpio.c unsigned long *valid_mask, valid_mask 168 drivers/platform/x86/intel_int0002_vgpio.c bitmap_clear(valid_mask, 0, GPE0A_PME_B0_VIRT_GPIO_PIN); valid_mask 749 fs/btrfs/tree-checker.c u32 valid_mask = (S_IFMT | S_ISUID | S_ISGID | S_ISVTX | 0777); valid_mask 794 fs/btrfs/tree-checker.c if (mode & ~valid_mask) { valid_mask 797 fs/btrfs/tree-checker.c mode & ~valid_mask); valid_mask 2334 fs/ceph/inode.c u32 valid_mask = STATX_BASIC_STATS; valid_mask 2354 fs/ceph/inode.c valid_mask |= STATX_BTIME; valid_mask 2380 fs/ceph/inode.c stat->result_mask = request_mask & valid_mask; valid_mask 956 fs/notify/fanotify/fanotify_user.c u32 valid_mask = FANOTIFY_EVENTS | FANOTIFY_EVENT_FLAGS; valid_mask 1000 fs/notify/fanotify/fanotify_user.c valid_mask |= FANOTIFY_PERM_EVENTS; valid_mask 1002 fs/notify/fanotify/fanotify_user.c if (mask & ~valid_mask) valid_mask 222 include/linux/gpio/driver.h unsigned long *valid_mask, valid_mask 231 include/linux/gpio/driver.h unsigned long *valid_mask; valid_mask 376 include/linux/gpio/driver.h unsigned long *valid_mask, valid_mask 421 include/linux/gpio/driver.h unsigned long *valid_mask; valid_mask 3236 include/linux/platform_data/cros_ec_commands.h uint32_t valid_mask; /* valid fields */ valid_mask 1372 mm/mempolicy.c unsigned long valid_mask = endmask; valid_mask 1374 mm/mempolicy.c valid_mask &= ~((1UL << (MAX_NUMNODES % BITS_PER_LONG)) - 1); valid_mask 1377 mm/mempolicy.c if (t & valid_mask)