val_regs           70 drivers/gpio/gpio-aspeed.c 	uint16_t	val_regs;	/* +0: Rd: read input value, Wr: set write latch
val_regs           99 drivers/gpio/gpio-aspeed.c 		.val_regs = 0x0000,
val_regs          108 drivers/gpio/gpio-aspeed.c 		.val_regs = 0x0020,
val_regs          117 drivers/gpio/gpio-aspeed.c 		.val_regs = 0x0070,
val_regs          126 drivers/gpio/gpio-aspeed.c 		.val_regs = 0x0078,
val_regs          135 drivers/gpio/gpio-aspeed.c 		.val_regs = 0x0080,
val_regs          144 drivers/gpio/gpio-aspeed.c 		.val_regs = 0x0088,
val_regs          153 drivers/gpio/gpio-aspeed.c 		.val_regs = 0x01E0,
val_regs          162 drivers/gpio/gpio-aspeed.c 		.val_regs = 0x01e8,
val_regs          214 drivers/gpio/gpio-aspeed.c 		return gpio->base + bank->val_regs + GPIO_VAL_VALUE;
val_regs          218 drivers/gpio/gpio-aspeed.c 		return gpio->base + bank->val_regs + GPIO_VAL_DIR;
val_regs         1037 drivers/gpio/gpio-aspeed.c 		*vreg_offset = bank->val_regs;
val_regs           38 drivers/gpio/sgpio-aspeed.c 	uint16_t    val_regs;
val_regs           53 drivers/gpio/sgpio-aspeed.c 		.val_regs = 0x0000,
val_regs           59 drivers/gpio/sgpio-aspeed.c 		.val_regs = 0x001C,
val_regs           65 drivers/gpio/sgpio-aspeed.c 		.val_regs = 0x0038,
val_regs           95 drivers/gpio/sgpio-aspeed.c 		return gpio->base + bank->val_regs + GPIO_VAL_VALUE;