v_taps 431 drivers/gpu/drm/amd/display/dc/calcs/calcs_logger.h DC_LOG_BANDWIDTH_CALCS(" [bw_fixed] v_taps[%d]:%d", i, bw_fixed_to_int(data->v_taps[i])); v_taps 369 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->v_taps[maximum_number_of_surfaces - 2] = bw_int_to_fixed(1); v_taps 370 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->v_taps[maximum_number_of_surfaces - 1] = bw_int_to_fixed(1); v_taps 422 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->v_taps[i] = bw_int_to_fixed(1); v_taps 531 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c if (bw_mtn(data->vsr[i], data->v_taps[i])) { v_taps 567 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c if (bw_mtn(bw_add(data->v_taps[i], bw_int_to_fixed(1)), data->lb_partitions[i])) { v_taps 790 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->v_filter_init[i] = bw_floor2(bw_div((bw_add(bw_add(bw_add(bw_int_to_fixed(1), data->v_taps[i]), data->vsr[i]), bw_mul(bw_mul(bw_int_to_fixed(data->interlace_mode[i]), bw_frc_to_fixed(5, 10)), data->vsr[i]))), bw_int_to_fixed(2)), bw_int_to_fixed(1)); v_taps 810 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c else if ((((dceip->underlay_downscale_prefetch_enabled == 1 && surface_type[i] != bw_def_graphics) || surface_type[i] == bw_def_graphics) && (bw_mtn(data->lb_partitions[i], bw_add(data->v_taps[i], bw_ceil2(data->vsr[i], bw_int_to_fixed(1))))))) { v_taps 1244 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->scaler_limits_factor = bw_max2(bw_div(data->v_taps[i], data->v_scaler_efficiency), bw_div(data->source_width_rounded_up_to_chunks[i], data->h_total[i])); v_taps 1247 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->scaler_limits_factor = bw_max3(bw_int_to_fixed(1), bw_ceil2(bw_div(data->h_taps[i], bw_int_to_fixed(4)), bw_int_to_fixed(1)), bw_mul(data->hsr[i], bw_max2(bw_div(data->v_taps[i], data->v_scaler_efficiency), bw_int_to_fixed(1)))); v_taps 1302 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c if (dceip->graphics_lb_nodownscaling_multi_line_prefetching == 1 && (bw_equ(data->vsr[i], bw_int_to_fixed(1)) || (bw_leq(data->vsr[i], bw_frc_to_fixed(8, 10)) && bw_leq(data->v_taps[i], bw_int_to_fixed(2)) && data->lb_bpc[i] == 8)) && surface_type[i] == bw_def_graphics) { v_taps 1695 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->scaler_limits_factor = bw_max2(bw_div(data->v_taps[i], data->v_scaler_efficiency), bw_div(data->source_width_rounded_up_to_chunks[i], data->h_total[i])); v_taps 1698 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->scaler_limits_factor = bw_max3(bw_int_to_fixed(1), bw_ceil2(bw_div(data->h_taps[i], bw_int_to_fixed(4)), bw_int_to_fixed(1)), bw_mul(data->hsr[i], bw_max2(bw_div(data->v_taps[i], data->v_scaler_efficiency), bw_int_to_fixed(1)))); v_taps 2803 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->v_taps[num_displays + 4] = bw_int_to_fixed(pipe[i].plane_res.scl_data.taps.v_taps); v_taps 2858 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->v_taps[num_displays * 2 + j] = bw_int_to_fixed(pipe[i].bottom_pipe->plane_res.scl_data.taps.v_taps); v_taps 2905 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->v_taps[num_displays + 4] = bw_int_to_fixed(pipe[i].plane_res.scl_data.taps.v_taps); v_taps 2956 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->v_taps[num_displays + 4] = pipe[i].stream->src.height == pipe[i].stream->dst.height ? bw_int_to_fixed(1) : bw_int_to_fixed(2); v_taps 2966 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->v_taps[num_displays + 4] = bw_int_to_fixed(1); v_taps 393 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c input->scale_taps.vtaps = pipe->plane_res.scl_data.taps.v_taps; v_taps 985 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->override_vta_ps[input_idx] = pipe->plane_res.scl_data.taps.v_taps; v_taps 87 drivers/gpu/drm/amd/display/dc/core/dc_debug.c plane_state->scaling_quality.v_taps, v_taps 291 drivers/gpu/drm/amd/display/dc/core/dc_debug.c update->scaling_info->scaling_quality.v_taps, v_taps 903 drivers/gpu/drm/amd/display/dc/core/dc_resource.c dc_fixpt_add_int(data->ratios.vert, data->taps.v_taps + 1), 2), 19); v_taps 916 drivers/gpu/drm/amd/display/dc/core/dc_resource.c orthogonal_rotation ? data->taps.v_taps : data->taps.h_taps, v_taps 934 drivers/gpu/drm/amd/display/dc/core/dc_resource.c orthogonal_rotation ? data->taps.h_taps : data->taps.v_taps, v_taps 1009 drivers/gpu/drm/amd/display/dc/core/dc_resource.c pipe_ctx->plane_res.scl_data.taps.v_taps = 1; v_taps 612 drivers/gpu/drm/amd/display/dc/dc_hw_types.h uint32_t v_taps; v_taps 122 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c if (data->taps.h_taps + data->taps.v_taps <= 2) { v_taps 133 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c SCL_V_NUM_OF_TAPS, data->taps.v_taps - 1); v_taps 276 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c dc_fixpt_from_int(data->taps.v_taps + 1)), v_taps 352 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c coeffs_v = get_filter_coeffs_16p(data->taps.v_taps, data->ratios.vert); v_taps 362 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c data->taps.v_taps, v_taps 367 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c data->taps.v_taps, v_taps 910 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c if (in_taps->v_taps >= max_num_of_lines) v_taps 923 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c scl_data->taps.v_taps = decide_taps(scl_data->ratios.vert, in_taps->v_taps, false); v_taps 925 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c scl_data->taps.v_taps_c = decide_taps(scl_data->ratios.vert_c, in_taps->v_taps, true); v_taps 929 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c if (in_taps->v_taps == 0 v_taps 930 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c && max_num_of_lines <= scl_data->taps.v_taps v_taps 931 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c && scl_data->taps.v_taps > 1) { v_taps 932 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c scl_data->taps.v_taps = max_num_of_lines - 1; v_taps 935 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c if (scl_data->taps.v_taps <= 1) v_taps 169 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c set_reg_field_value(value, data->taps.v_taps - 1, v_taps 178 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c if (data->taps.h_taps + data->taps.v_taps > 2) { v_taps 562 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c coeffs_v = get_filter_coeffs_64p(data->taps.v_taps, data->ratios.vert); v_taps 574 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c data->taps.v_taps, v_taps 173 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c if (in_taps->v_taps == 0) v_taps 174 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c scl_data->taps.v_taps = 4; v_taps 176 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c scl_data->taps.v_taps = in_taps->v_taps; v_taps 193 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c scl_data->taps.v_taps = 1; v_taps 318 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c v_2tap_hardcode_coef_en = scl_data->taps.v_taps < 3 v_taps 320 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c && (scl_data->taps.v_taps > 1 && scl_data->taps.v_taps_c > 1); v_taps 339 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c scl_data->taps.v_taps, scl_data->ratios.vert); v_taps 364 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c dpp, scl_data->taps.v_taps, v_taps 483 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c int vtaps = scl_data->taps.v_taps; v_taps 570 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c SCL_V_NUM_TAPS, scl_data->taps.v_taps - 1, v_taps 730 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c SCL_V_NUM_TAPS, scl_data->taps.v_taps - 1, v_taps 418 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.c if (in_taps->v_taps == 0) { v_taps 420 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.c scl_data->taps.v_taps = 8; v_taps 422 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.c scl_data->taps.v_taps = 4; v_taps 424 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.c scl_data->taps.v_taps = in_taps->v_taps; v_taps 447 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.c scl_data->taps.v_taps = 1; v_taps 807 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c uint32_t v_taps_luma = num_taps.v_taps; v_taps 2126 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.scale_taps.vtaps = scl->taps.v_taps; v_taps 397 drivers/gpu/drm/amd/display/dc/inc/dce_calcs.h struct bw_fixed v_taps[maximum_number_of_surfaces];