v_scale_ratio     433 drivers/gpu/drm/amd/display/dc/calcs/calcs_logger.h 		DC_LOG_BANDWIDTH_CALCS("	[bw_fixed] v_scale_ratio[%d]:%d", i, bw_fixed_to_int(data->v_scale_ratio[i]));
v_scale_ratio     396 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 	data->v_scale_ratio[maximum_number_of_surfaces - 2] = bw_int_to_fixed(1);
v_scale_ratio     397 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 	data->v_scale_ratio[maximum_number_of_surfaces - 1] = bw_int_to_fixed(1);
v_scale_ratio     420 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 			if (bw_equ(data->h_scale_ratio[i], bw_int_to_fixed(1)) && bw_equ(data->v_scale_ratio[i], bw_int_to_fixed(1)) && surface_type[i] == bw_def_graphics && data->stereo_mode[i] == bw_def_mono && data->interlace_mode[i] == 0) {
v_scale_ratio     429 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 				data->vsr_after_surface_type = bw_div(data->v_scale_ratio[i], bw_int_to_fixed(2));
v_scale_ratio     436 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 				data->vsr_after_surface_type = data->v_scale_ratio[i];
v_scale_ratio    1430 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 				data->v_blank_dram_speed_change_margin[k] = bw_sub(bw_sub(bw_sub(bw_div(bw_mul((bw_sub(data->v_total[k], bw_sub(bw_div(data->src_height[k], data->v_scale_ratio[k]), bw_int_to_fixed(4)))), data->h_total[k]), data->pixel_rate[k]), vbios->nbp_state_change_latency), data->dmif_burst_time[low][s_low]), data->dram_speed_change_line_source_transfer_time[k][low][s_low]);
v_scale_ratio    1434 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 				data->v_blank_dram_speed_change_margin[k] = bw_sub(bw_sub(bw_sub(bw_sub(bw_div(bw_mul((bw_sub(data->v_total[k], bw_sub(bw_div(data->src_height[k], data->v_scale_ratio[k]), bw_int_to_fixed(4)))), data->h_total[k]), data->pixel_rate[k]), vbios->nbp_state_change_latency), data->dmif_burst_time[low][s_low]), data->mcifwr_burst_time[low][s_low]), data->dram_speed_change_line_source_transfer_time[k][low][s_low]);
v_scale_ratio    1992 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 			data->v_blank_nbp_state_dram_speed_change_latency_supported = bw_min2(data->v_blank_nbp_state_dram_speed_change_latency_supported, bw_add(bw_sub(bw_div(bw_mul((bw_sub(data->v_total[i], bw_sub(bw_div(data->src_height[i], data->v_scale_ratio[i]), bw_int_to_fixed(4)))), data->h_total[i]), data->pixel_rate[i]), data->nbp_state_change_watermark[i]), vbios->nbp_state_change_latency));
v_scale_ratio    2805 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 		data->v_scale_ratio[num_displays + 4] = fixed31_32_to_bw_fixed(pipe[i].plane_res.scl_data.ratios.vert.value);
v_scale_ratio    2861 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 			data->v_scale_ratio[num_displays * 2 + j] = fixed31_32_to_bw_fixed(
v_scale_ratio    2907 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 			data->v_scale_ratio[num_displays + 4] = fixed31_32_to_bw_fixed(pipe[i].plane_res.scl_data.ratios.vert.value);
v_scale_ratio    2958 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 			data->v_scale_ratio[num_displays + 4] = bw_frc_to_fixed(pipe[i].stream->src.height, pipe[i].stream->dst.height);
v_scale_ratio    2968 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 			data->v_scale_ratio[num_displays + 4] = bw_int_to_fixed(1);
v_scale_ratio     430 drivers/gpu/drm/amd/display/dc/dc_hw_types.h 	struct fixed31_32 v_scale_ratio;
v_scale_ratio    2693 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 		.v_scale_ratio = pipe_ctx->plane_res.scl_data.ratios.vert,
v_scale_ratio    2964 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 		.v_scale_ratio = pipe_ctx->plane_res.scl_data.ratios.vert,
v_scale_ratio     399 drivers/gpu/drm/amd/display/dc/inc/dce_calcs.h 	struct bw_fixed v_scale_ratio[maximum_number_of_surfaces];