v_off 283 drivers/gpu/ipu-v3/ipu-cpmem.c void ipu_cpmem_set_uv_offset(struct ipuv3_channel *ch, u32 u_off, u32 v_off) v_off 285 drivers/gpu/ipu-v3/ipu-cpmem.c WARN_ON_ONCE((u_off & 0x7) || (v_off & 0x7)); v_off 288 drivers/gpu/ipu-v3/ipu-cpmem.c ipu_ch_param_write_field(ch, IPU_FIELD_VBO, v_off / 8); v_off 108 drivers/gpu/ipu-v3/ipu-image-convert.c u32 v_off; v_off 977 drivers/gpu/ipu-v3/ipu-image-convert.c u32 uv_row_off, uv_col_off, uv_off, u_off, v_off, tmp; v_off 1007 drivers/gpu/ipu-v3/ipu-image-convert.c v_off = (fmt->uv_packed) ? 0 : u_off + uv_size; v_off 1010 drivers/gpu/ipu-v3/ipu-image-convert.c u_off = v_off; v_off 1011 drivers/gpu/ipu-v3/ipu-image-convert.c v_off = tmp; v_off 1016 drivers/gpu/ipu-v3/ipu-image-convert.c image->tile[tile++].v_off = v_off; v_off 1018 drivers/gpu/ipu-v3/ipu-image-convert.c if ((y_off & 0x7) || (u_off & 0x7) || (v_off & 0x7)) { v_off 1025 drivers/gpu/ipu-v3/ipu-image-convert.c y_off, u_off, v_off); v_off 1058 drivers/gpu/ipu-v3/ipu-image-convert.c image->tile[tile++].v_off = 0; v_off 1328 drivers/gpu/ipu-v3/ipu-image-convert.c tile_image.v_offset = image->tile[tile_idx[0]].v_off; v_off 1677 drivers/gpu/ipu-v3/ipu-image-convert.c src_tile->v_off); v_off 1681 drivers/gpu/ipu-v3/ipu-image-convert.c dst_tile->v_off); v_off 22 drivers/media/platform/rockchip/rga/rga-hw.c unsigned int v_off; v_off 68 drivers/media/platform/rockchip/rga/rga-hw.c lt->v_off = lt->u_off + frm->width * frm->height / uv_factor; v_off 72 drivers/media/platform/rockchip/rga/rga-hw.c lb->v_off = lt->v_off + (h / y_div - 1) * uv_stride; v_off 76 drivers/media/platform/rockchip/rga/rga-hw.c rt->v_off = lt->v_off + w / x_div - 1; v_off 80 drivers/media/platform/rockchip/rga/rga-hw.c rb->v_off = lb->v_off + w / x_div - 1; v_off 330 drivers/media/platform/rockchip/rga/rga-hw.c src_offsets.left_top.v_off; v_off 344 drivers/media/platform/rockchip/rga/rga-hw.c dst_offset->v_off; v_off 260 include/video/imx-ipu-v3.h void ipu_cpmem_set_uv_offset(struct ipuv3_channel *ch, u32 u_off, u32 v_off);