v_init            256 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c 	struct fixed31_32 v_init;
v_init            272 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c 	v_init =
v_init            278 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c 	inits->v_init.integer = dc_fixpt_floor(v_init);
v_init            279 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c 	inits->v_init.fraction = dc_fixpt_u0d19(v_init) << 5;
v_init            298 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c 			SCL_V_INIT_INT, inits->v_init.integer,
v_init            299 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c 			SCL_V_INIT_FRAC, inits->v_init.fraction);
v_init            457 drivers/gpu/drm/amd/display/dc/dce/dce_transform.h 	struct init_int_and_frac v_init;
v_init            300 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c 	uint32_t v_init;
v_init            310 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c 	v_init = patched_crtc_timing.v_total - patched_crtc_timing.v_front_porch;
v_init            313 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c 	asic_blank_end = v_init -
v_init            326 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c 			v_init = v_init / 2;
v_init            334 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c 			VTG0_VCOUNT_INIT, v_init);