v_addressable 3145 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c dst.height = stream->timing.v_addressable; v_addressable 3165 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c dst.y = (stream->timing.v_addressable - dst.height) / 2; v_addressable 3372 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c timing_out->v_addressable = mode_in->crtc_vdisplay; v_addressable 1757 drivers/gpu/drm/amd/display/dc/bios/command_table.c params.usV_Disp = cpu_to_le16((uint16_t)(bp_params->v_addressable)); v_addressable 1831 drivers/gpu/drm/amd/display/dc/bios/command_table.c params.usV_Size = cpu_to_le16((uint16_t)bp_params->v_addressable); v_addressable 1834 drivers/gpu/drm/amd/display/dc/bios/command_table.c cpu_to_le16((uint16_t)(bp_params->v_total - bp_params->v_addressable)); v_addressable 1845 drivers/gpu/drm/amd/display/dc/bios/command_table.c cpu_to_le16((uint16_t)(bp_params->v_sync_start - bp_params->v_addressable)); v_addressable 388 drivers/gpu/drm/amd/display/dc/bios/command_table2.c params.v_size = cpu_to_le16((uint16_t)bp_params->v_addressable); v_addressable 392 drivers/gpu/drm/amd/display/dc/bios/command_table2.c bp_params->v_addressable)); v_addressable 407 drivers/gpu/drm/amd/display/dc/bios/command_table2.c bp_params->v_addressable)); v_addressable 2964 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->src_height[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->timing.v_addressable); v_addressable 411 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c input->dest.vactive = pipe->stream->timing.v_addressable + pipe->stream->timing.v_border_top v_addressable 430 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c - pipe->stream->timing.v_addressable v_addressable 879 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->vactive[input_idx] = pipe->stream->timing.v_addressable + v_addressable 893 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->viewport_height[input_idx] = pipe->stream->timing.v_addressable; v_addressable 1188 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c vesa_sync_start = pipe->stream->timing.v_addressable + v_addressable 1199 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c pipe->stream->timing.v_addressable + v_addressable 108 drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c - stream->timing.v_addressable); v_addressable 363 drivers/gpu/drm/amd/display/dc/core/dc.c param.windowa_y_end = pipe->stream->timing.v_addressable; v_addressable 367 drivers/gpu/drm/amd/display/dc/core/dc.c param.windowb_y_end = pipe->stream->timing.v_addressable; v_addressable 1137 drivers/gpu/drm/amd/display/dc/core/dc.c context->streams[i]->timing.v_addressable, v_addressable 2036 drivers/gpu/drm/amd/display/dc/core/dc_link.c && (stream->timing.v_addressable == 480); v_addressable 1876 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c timing->v_addressable == (uint32_t) 480) v_addressable 3062 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c int height = pipe_ctx->stream->timing.v_addressable + v_addressable 400 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c dsc_cfg.pic_height = stream->timing.v_addressable + stream->timing.v_border_top + stream->timing.v_border_bottom; v_addressable 501 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c dsc_cfg.pic_height = stream->timing.v_addressable + stream->timing.v_border_top + stream->timing.v_border_bottom; v_addressable 388 drivers/gpu/drm/amd/display/dc/core/dc_resource.c if (stream1->timing.v_addressable v_addressable 389 drivers/gpu/drm/amd/display/dc/core/dc_resource.c != stream2->timing.v_addressable) v_addressable 994 drivers/gpu/drm/amd/display/dc/core/dc_resource.c pipe_ctx->plane_res.scl_data.v_active = timing->v_addressable + timing->v_border_top + timing->v_border_bottom; v_addressable 786 drivers/gpu/drm/amd/display/dc/dc_hw_types.h uint32_t v_addressable; v_addressable 556 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c - stream->timing.v_addressable); v_addressable 299 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c hw_crtc_timing.v_addressable /= 2; v_addressable 488 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c hw_crtc_timing.v_addressable - hw_crtc_timing.v_border_bottom - v_addressable 516 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c hw_crtc_timing.v_addressable + hw_crtc_timing.v_border_bottom); v_addressable 1137 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c stream->timing.v_addressable v_addressable 1867 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c params.source_view_height = pipe_ctx->stream->timing.v_addressable; v_addressable 914 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c context->streams[0]->timing.v_addressable, v_addressable 292 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c uint32_t v_sync_start =dc_crtc_timing->v_addressable + vsync_offset; v_addressable 314 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c bp_params.v_addressable = patched_crtc_timing.v_addressable; v_addressable 602 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c uint32_t v_sync_start =timing->v_addressable + vsync_offset; v_addressable 687 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c tmp = tmp + timing->v_addressable + timing->v_border_top + v_addressable 248 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c uint32_t v_sync_start = timing->v_addressable + vsync_offset; v_addressable 311 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c tmp = tmp + timing->v_addressable + timing->v_border_top + v_addressable 108 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c (timing->v_total - timing->v_addressable - v_addressable 436 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c uint32_t v_sync_start = timing->v_addressable + vsync_offset; v_addressable 477 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tmp2 = tmp1 + timing->v_addressable + timing->v_border_top + v_addressable 671 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c timing->v_total - timing->v_addressable - v_addressable 3089 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c vesa_sync_start = patched_crtc_timing.v_addressable + v_addressable 309 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c uint32_t space1_size = timing->v_total - timing->v_addressable; v_addressable 311 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c uint32_t space2_size = timing->v_total - timing->v_addressable; v_addressable 228 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c patched_crtc_timing.v_addressable - v_addressable 315 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c patched_crtc_timing.v_addressable - v_addressable 515 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c v_blank = (timing->v_total - timing->v_addressable - v_addressable 1250 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c hw_crtc_timing.v_addressable = s.v_total - ((s.v_total - s.v_blank_start) + s.v_blank_end); v_addressable 1278 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c if (otg_timing->v_addressable != hw_crtc_timing.v_addressable) v_addressable 272 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c hw_crtc_timing.v_addressable /= 2; v_addressable 449 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c hw_crtc_timing.v_addressable - hw_crtc_timing.v_border_bottom - v_addressable 473 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c hw_crtc_timing.v_addressable + hw_crtc_timing.v_border_bottom); v_addressable 861 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c int height = stream->timing.v_addressable + stream->timing.v_border_bottom + stream->timing.v_border_top; v_addressable 1914 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c (timing->v_total - timing->v_addressable v_addressable 1930 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c - timing->v_addressable v_addressable 1936 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.dest.vactive = timing->v_addressable; v_addressable 2051 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.viewport_height = timing->v_addressable; v_addressable 2274 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c dsc_cfg.pic_height = stream->timing.v_addressable + stream->timing.v_border_top v_addressable 533 drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c pic_height = timing->v_addressable + timing->v_border_top + timing->v_border_bottom; v_addressable 172 drivers/gpu/drm/amd/display/include/bios_parser_types.h uint32_t v_addressable;