vMPLL_DQ_FUNC_CNTL 4847 drivers/gpu/drm/amd/amdgpu/si_dpm.c table->initialState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL = vMPLL_DQ_FUNC_CNTL 5048 drivers/gpu/drm/amd/amdgpu/si_dpm.c table->ACPIState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL = vMPLL_DQ_FUNC_CNTL 5415 drivers/gpu/drm/amd/amdgpu/si_dpm.c mclk->vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); vMPLL_DQ_FUNC_CNTL 381 drivers/gpu/drm/amd/amdgpu/si_dpm.h uint32_t vMPLL_DQ_FUNC_CNTL; vMPLL_DQ_FUNC_CNTL 727 drivers/gpu/drm/amd/amdgpu/si_dpm.h uint32_t vMPLL_DQ_FUNC_CNTL; vMPLL_DQ_FUNC_CNTL 122 drivers/gpu/drm/amd/amdgpu/sislands_smc.h uint32_t vMPLL_DQ_FUNC_CNTL; vMPLL_DQ_FUNC_CNTL 4296 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c data->clock_registers.vMPLL_DQ_FUNC_CNTL = vMPLL_DQ_FUNC_CNTL 122 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h uint32_t vMPLL_DQ_FUNC_CNTL; vMPLL_DQ_FUNC_CNTL 1033 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c uint32_t mpll_dq_func_cntl = data->clock_registers.vMPLL_DQ_FUNC_CNTL; vMPLL_DQ_FUNC_CNTL 1487 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_DQ_FUNC_CNTL); vMPLL_DQ_FUNC_CNTL 1057 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c uint32_t mpll_dq_func_cntl = data->clock_registers.vMPLL_DQ_FUNC_CNTL; vMPLL_DQ_FUNC_CNTL 1535 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_DQ_FUNC_CNTL); vMPLL_DQ_FUNC_CNTL 800 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c uint32_t mpll_dq_func_cntl = data->clock_registers.vMPLL_DQ_FUNC_CNTL; vMPLL_DQ_FUNC_CNTL 1277 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_DQ_FUNC_CNTL); vMPLL_DQ_FUNC_CNTL 601 drivers/gpu/drm/radeon/cypress_dpm.c mclk->mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); vMPLL_DQ_FUNC_CNTL 1248 drivers/gpu/drm/radeon/cypress_dpm.c table->initialState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL = vMPLL_DQ_FUNC_CNTL 1438 drivers/gpu/drm/radeon/cypress_dpm.c table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL = vMPLL_DQ_FUNC_CNTL 1696 drivers/gpu/drm/radeon/ni_dpm.c table->initialState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL = vMPLL_DQ_FUNC_CNTL 1907 drivers/gpu/drm/radeon/ni_dpm.c table->ACPIState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); vMPLL_DQ_FUNC_CNTL 2284 drivers/gpu/drm/radeon/ni_dpm.c mclk->vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); vMPLL_DQ_FUNC_CNTL 76 drivers/gpu/drm/radeon/nislands_smc.h uint32_t vMPLL_DQ_FUNC_CNTL; vMPLL_DQ_FUNC_CNTL 274 drivers/gpu/drm/radeon/rv740_dpm.c mclk->mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); vMPLL_DQ_FUNC_CNTL 375 drivers/gpu/drm/radeon/rv740_dpm.c table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); vMPLL_DQ_FUNC_CNTL 475 drivers/gpu/drm/radeon/rv770_dpm.c mclk->mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); vMPLL_DQ_FUNC_CNTL 983 drivers/gpu/drm/radeon/rv770_dpm.c table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); vMPLL_DQ_FUNC_CNTL 1034 drivers/gpu/drm/radeon/rv770_dpm.c table->initialState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL = vMPLL_DQ_FUNC_CNTL 50 drivers/gpu/drm/radeon/rv770_smc.h uint32_t vMPLL_DQ_FUNC_CNTL; vMPLL_DQ_FUNC_CNTL 4383 drivers/gpu/drm/radeon/si_dpm.c table->initialState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL = vMPLL_DQ_FUNC_CNTL 4585 drivers/gpu/drm/radeon/si_dpm.c table->ACPIState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL = vMPLL_DQ_FUNC_CNTL 4953 drivers/gpu/drm/radeon/si_dpm.c mclk->vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); vMPLL_DQ_FUNC_CNTL 122 drivers/gpu/drm/radeon/sislands_smc.h uint32_t vMPLL_DQ_FUNC_CNTL;