vCG_SPLL_FUNC_CNTL_2 4865 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 =
vCG_SPLL_FUNC_CNTL_2 5063 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 =
vCG_SPLL_FUNC_CNTL_2 5305 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	sclk->vCG_SPLL_FUNC_CNTL_2 = spll_func_cntl_2;
vCG_SPLL_FUNC_CNTL_2 5325 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		sclk->vCG_SPLL_FUNC_CNTL_2 = cpu_to_be32(sclk_tmp.vCG_SPLL_FUNC_CNTL_2);
vCG_SPLL_FUNC_CNTL_2  368 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint32_t        vCG_SPLL_FUNC_CNTL_2;
vCG_SPLL_FUNC_CNTL_2  710 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint32_t        vCG_SPLL_FUNC_CNTL_2;
vCG_SPLL_FUNC_CNTL_2  106 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint32_t    vCG_SPLL_FUNC_CNTL_2;
vCG_SPLL_FUNC_CNTL_2 4280 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	data->clock_registers.vCG_SPLL_FUNC_CNTL_2       =
vCG_SPLL_FUNC_CNTL_2  114 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h 	uint32_t  vCG_SPLL_FUNC_CNTL_2;
vCG_SPLL_FUNC_CNTL_2 1384 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	uint32_t spll_func_cntl_2  = data->clock_registers.vCG_SPLL_FUNC_CNTL_2;
vCG_SPLL_FUNC_CNTL_2 1312 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	uint32_t spll_func_cntl_2  = data->clock_registers.vCG_SPLL_FUNC_CNTL_2;
vCG_SPLL_FUNC_CNTL_2 1432 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	uint32_t spll_func_cntl_2  = data->clock_registers.vCG_SPLL_FUNC_CNTL_2;
vCG_SPLL_FUNC_CNTL_2 1184 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	uint32_t spll_func_cntl_2  = data->clock_registers.vCG_SPLL_FUNC_CNTL_2;
vCG_SPLL_FUNC_CNTL_2 1267 drivers/gpu/drm/radeon/cypress_dpm.c 	table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 =
vCG_SPLL_FUNC_CNTL_2 1450 drivers/gpu/drm/radeon/cypress_dpm.c 	table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 =
vCG_SPLL_FUNC_CNTL_2 1713 drivers/gpu/drm/radeon/ni_dpm.c 	table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 =
vCG_SPLL_FUNC_CNTL_2 1915 drivers/gpu/drm/radeon/ni_dpm.c 	table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 = cpu_to_be32(spll_func_cntl_2);
vCG_SPLL_FUNC_CNTL_2 2060 drivers/gpu/drm/radeon/ni_dpm.c 	sclk->vCG_SPLL_FUNC_CNTL_2 = spll_func_cntl_2;
vCG_SPLL_FUNC_CNTL_2 2080 drivers/gpu/drm/radeon/ni_dpm.c 		sclk->vCG_SPLL_FUNC_CNTL_2 = cpu_to_be32(sclk_tmp.vCG_SPLL_FUNC_CNTL_2);
vCG_SPLL_FUNC_CNTL_2   59 drivers/gpu/drm/radeon/nislands_smc.h     uint32_t        vCG_SPLL_FUNC_CNTL_2;
vCG_SPLL_FUNC_CNTL_2  110 drivers/gpu/drm/radeon/rv730_dpm.c 	sclk->vCG_SPLL_FUNC_CNTL_2 = cpu_to_be32(spll_func_cntl_2);
vCG_SPLL_FUNC_CNTL_2  305 drivers/gpu/drm/radeon/rv730_dpm.c 	table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 = cpu_to_be32(spll_func_cntl_2);
vCG_SPLL_FUNC_CNTL_2  346 drivers/gpu/drm/radeon/rv730_dpm.c 	table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 =
vCG_SPLL_FUNC_CNTL_2  178 drivers/gpu/drm/radeon/rv740_dpm.c 	sclk->vCG_SPLL_FUNC_CNTL_2 = cpu_to_be32(spll_func_cntl_2);
vCG_SPLL_FUNC_CNTL_2  383 drivers/gpu/drm/radeon/rv740_dpm.c 	table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 = cpu_to_be32(spll_func_cntl_2);
vCG_SPLL_FUNC_CNTL_2  557 drivers/gpu/drm/radeon/rv770_dpm.c 	sclk->vCG_SPLL_FUNC_CNTL_2 = cpu_to_be32(spll_func_cntl_2);
vCG_SPLL_FUNC_CNTL_2  992 drivers/gpu/drm/radeon/rv770_dpm.c 	table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 = cpu_to_be32(spll_func_cntl_2);
vCG_SPLL_FUNC_CNTL_2 1053 drivers/gpu/drm/radeon/rv770_dpm.c 	table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 =
vCG_SPLL_FUNC_CNTL_2   37 drivers/gpu/drm/radeon/rv770_smc.h     uint32_t        vCG_SPLL_FUNC_CNTL_2;
vCG_SPLL_FUNC_CNTL_2 4401 drivers/gpu/drm/radeon/si_dpm.c 	table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 =
vCG_SPLL_FUNC_CNTL_2 4600 drivers/gpu/drm/radeon/si_dpm.c 	table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 =
vCG_SPLL_FUNC_CNTL_2 4843 drivers/gpu/drm/radeon/si_dpm.c 	sclk->vCG_SPLL_FUNC_CNTL_2 = spll_func_cntl_2;
vCG_SPLL_FUNC_CNTL_2 4863 drivers/gpu/drm/radeon/si_dpm.c 		sclk->vCG_SPLL_FUNC_CNTL_2 = cpu_to_be32(sclk_tmp.vCG_SPLL_FUNC_CNTL_2);
vCG_SPLL_FUNC_CNTL_2  106 drivers/gpu/drm/radeon/sislands_smc.h     uint32_t    vCG_SPLL_FUNC_CNTL_2;