uw 137 arch/arm64/include/asm/processor.h } uw; uw 155 arch/arm64/include/asm/processor.h BUILD_BUG_ON(sizeof_field(struct thread_struct, uw) != uw 156 arch/arm64/include/asm/processor.h sizeof_field(struct thread_struct, uw.tp_value) + uw 157 arch/arm64/include/asm/processor.h sizeof_field(struct thread_struct, uw.tp2_value) + uw 158 arch/arm64/include/asm/processor.h sizeof_field(struct thread_struct, uw.fpsimd_state)); uw 160 arch/arm64/include/asm/processor.h *offset = offsetof(struct thread_struct, uw); uw 161 arch/arm64/include/asm/processor.h *size = sizeof_field(struct thread_struct, uw); uw 169 arch/arm64/include/asm/processor.h __tls = &(t)->thread.uw.tp2_value; \ uw 171 arch/arm64/include/asm/processor.h __tls = &(t)->thread.uw.tp_value; \ uw 175 arch/arm64/include/asm/processor.h #define task_user_tls(t) (&(t)->thread.uw.tp_value) uw 277 arch/arm64/kernel/fpsimd.c ¤t->thread.uw.fpsimd_state.fpsr, uw 280 arch/arm64/kernel/fpsimd.c fpsimd_load_state(¤t->thread.uw.fpsimd_state); uw 439 arch/arm64/kernel/fpsimd.c struct user_fpsimd_state const *fst = &task->thread.uw.fpsimd_state; uw 463 arch/arm64/kernel/fpsimd.c struct user_fpsimd_state *fst = &task->thread.uw.fpsimd_state; uw 561 arch/arm64/kernel/fpsimd.c struct user_fpsimd_state const *fst = &task->thread.uw.fpsimd_state; uw 1001 arch/arm64/kernel/fpsimd.c &next->thread.uw.fpsimd_state; uw 1020 arch/arm64/kernel/fpsimd.c memset(¤t->thread.uw.fpsimd_state, 0, uw 1021 arch/arm64/kernel/fpsimd.c sizeof(current->thread.uw.fpsimd_state)); uw 1098 arch/arm64/kernel/fpsimd.c last->st = ¤t->thread.uw.fpsimd_state; uw 1171 arch/arm64/kernel/fpsimd.c current->thread.uw.fpsimd_state = *state; uw 302 arch/arm64/kernel/process.c current->thread.uw.tp_value = 0; uw 401 arch/arm64/kernel/process.c p->thread.uw.tp_value = tls; uw 436 arch/arm64/kernel/process.c write_sysreg(next->thread.uw.tp_value, tpidrro_el0); uw 637 arch/arm64/kernel/ptrace.c uregs = &target->thread.uw.fpsimd_state; uw 671 arch/arm64/kernel/ptrace.c newstate = target->thread.uw.fpsimd_state; uw 678 arch/arm64/kernel/ptrace.c target->thread.uw.fpsimd_state = newstate; uw 706 arch/arm64/kernel/ptrace.c unsigned long *tls = &target->thread.uw.tp_value; uw 719 arch/arm64/kernel/ptrace.c unsigned long tls = target->thread.uw.tp_value; uw 725 arch/arm64/kernel/ptrace.c target->thread.uw.tp_value = tls; uw 853 arch/arm64/kernel/ptrace.c &target->thread.uw.fpsimd_state.fpsr, uw 952 arch/arm64/kernel/ptrace.c &target->thread.uw.fpsimd_state.fpsr, uw 1368 arch/arm64/kernel/ptrace.c uregs = &target->thread.uw.fpsimd_state; uw 1404 arch/arm64/kernel/ptrace.c uregs = &target->thread.uw.fpsimd_state; uw 1427 arch/arm64/kernel/ptrace.c compat_ulong_t tls = (compat_ulong_t)target->thread.uw.tp_value; uw 1437 arch/arm64/kernel/ptrace.c compat_ulong_t tls = target->thread.uw.tp_value; uw 1443 arch/arm64/kernel/ptrace.c target->thread.uw.tp_value = tls; uw 1735 arch/arm64/kernel/ptrace.c ret = put_user((compat_ulong_t)child->thread.uw.tp_value, uw 173 arch/arm64/kernel/signal.c ¤t->thread.uw.fpsimd_state; uw 97 arch/arm64/kernel/signal32.c ¤t->thread.uw.fpsimd_state; uw 92 arch/arm64/kernel/sys_compat.c current->thread.uw.tp_value = regs->regs[0]; uw 32 arch/arm64/kvm/fpsimd.c struct user_fpsimd_state *fpsimd = ¤t->thread.uw.fpsimd_state; uw 366 arch/arm64/kvm/hyp/switch.c struct thread_struct, uw.fpsimd_state); uw 144 arch/sparc/include/asm/uaccess_64.h case 4: __get_user_asm(__gu_val, uw, addr, __gu_ret); break; \ uw 1980 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c unsigned uw; uw 1994 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c uw = (query >> 8) * 1000000 + (query & 0xff) * 1000; uw 1996 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c return snprintf(buf, PAGE_SIZE, "%u\n", uw); uw 448 virt/kvm/arm/vgic/vgic-mmio-v3.c #define REGISTER_DESC_WITH_BITS_PER_IRQ_SHARED(off, rd, wr, ur, uw, bpi, acc) \ uw 464 virt/kvm/arm/vgic/vgic-mmio-v3.c .uaccess_write = uw, \ uw 67 virt/kvm/arm/vgic/vgic-mmio.h #define REGISTER_DESC_WITH_BITS_PER_IRQ(off, rd, wr, ur, uw, bpi, acc) \ uw 76 virt/kvm/arm/vgic/vgic-mmio.h .uaccess_write = uw, \