uvd_table 2054 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct amdgpu_uvd_clock_voltage_dependency_table *uvd_table = uvd_table 2063 drivers/gpu/drm/amd/amdgpu/kv_dpm.c if (uvd_table->count) { uvd_table 2064 drivers/gpu/drm/amd/amdgpu/kv_dpm.c for (i = 0; i < uvd_table->count; i++) uvd_table 2065 drivers/gpu/drm/amd/amdgpu/kv_dpm.c uvd_table->entries[i].v = uvd_table 2067 drivers/gpu/drm/amd/amdgpu/kv_dpm.c uvd_table->entries[i].v); uvd_table 1113 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c struct phm_uvd_clock_voltage_dependency_table *uvd_table; uvd_table 1119 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c uvd_table = kzalloc(table_size, GFP_KERNEL); uvd_table 1120 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c if (NULL == uvd_table) uvd_table 1123 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c uvd_table->count = table->numEntries; uvd_table 1128 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c uvd_table->entries[i].v = (unsigned long)le16_to_cpu(table->entries[i].usVoltage); uvd_table 1129 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c uvd_table->entries[i].vclk = ((unsigned long)entry->ucVClkHigh << 16) uvd_table 1131 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c uvd_table->entries[i].dclk = ((unsigned long)entry->ucDClkHigh << 16) uvd_table 1135 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c *ptable = uvd_table; uvd_table 447 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c struct phm_uvd_clock_voltage_dependency_table *uvd_table = uvd_table 469 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c PP_ASSERT_WITH_CODE((uvd_table->count <= SMU8_MAX_HARDWARE_POWERLEVELS), uvd_table 509 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c (i < uvd_table->count) ? (uint8_t)uvd_table->entries[i].v : 0; uvd_table 511 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c (i < uvd_table->count) ? uvd_table->entries[i].vclk : 0; uvd_table 521 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c (i < uvd_table->count) ? (uint8_t)uvd_table->entries[i].v : 0; uvd_table 523 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c (i < uvd_table->count) ? uvd_table->entries[i].dclk : 0; uvd_table 1680 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c struct phm_uvd_clock_voltage_dependency_table *uvd_table = uvd_table 1724 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c vclk = uvd_table->entries[uvd_index].vclk; uvd_table 1736 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c dclk = uvd_table->entries[uvd_index].dclk; uvd_table 1522 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c struct phm_uvd_clock_voltage_dependency_table *uvd_table = uvd_table 1525 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c table->UvdLevelCount = (uint8_t)(uvd_table->count); uvd_table 1529 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c uvd_table->entries[count].vclk; uvd_table 1531 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c uvd_table->entries[count].dclk; uvd_table 1533 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c uvd_table->entries[count].v * VOLTAGE_SCALE; uvd_table 2858 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c struct phm_uvd_clock_voltage_dependency_table *uvd_table = uvd_table 2868 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c if (PP_CAP(PHM_PlatformCaps_UVDDPM) || uvd_table->count <= 0) uvd_table 2871 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c smu_data->smc_state_table.UvdBootLevel = uvd_table->count - 1; uvd_table 2878 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c for (i = uvd_table->count - 1; i >= 0; i--) { uvd_table 2879 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c if (uvd_table->entries[i].v <= max_vddc) uvd_table 1988 drivers/gpu/drm/radeon/kv_dpm.c struct radeon_uvd_clock_voltage_dependency_table *uvd_table = uvd_table 1997 drivers/gpu/drm/radeon/kv_dpm.c if (uvd_table->count) { uvd_table 1998 drivers/gpu/drm/radeon/kv_dpm.c for (i = 0; i < uvd_table->count; i++) uvd_table 1999 drivers/gpu/drm/radeon/kv_dpm.c uvd_table->entries[i].v = uvd_table 2001 drivers/gpu/drm/radeon/kv_dpm.c uvd_table->entries[i].v);