uvd_dpm           259 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.h 	struct smu10_dpm_entry uvd_dpm;
uvd_dpm           588 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 	data->uvd_dpm.soft_min_clk = 0;
uvd_dpm           589 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 	data->uvd_dpm.hard_min_clk = 0;
uvd_dpm           599 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 	data->uvd_dpm.soft_max_clk = clock;
uvd_dpm           600 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 	data->uvd_dpm.hard_max_clk = clock;
uvd_dpm          1850 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 			data->uvd_dpm.hard_min_clk =
uvd_dpm          1856 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 					data->uvd_dpm.hard_min_clk,
uvd_dpm           271 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h 	struct smu8_dpm_entry uvd_dpm;
uvd_dpm           932 drivers/gpu/drm/radeon/trinity_dpm.c 	if (pi->uvd_dpm) {
uvd_dpm          1479 drivers/gpu/drm/radeon/trinity_dpm.c 	if (pi->uvd_dpm && r600_is_uvd_state(rps->class, rps->class2)) {
uvd_dpm          1986 drivers/gpu/drm/radeon/trinity_dpm.c 	pi->uvd_dpm = true; /* ??? */
uvd_dpm           112 drivers/gpu/drm/radeon/trinity_dpm.h 	bool uvd_dpm;