uv 54 arch/arm/mach-omap2/omap_twl.c static u8 twl4030_uv_to_vsel(unsigned long uv) uv 56 arch/arm/mach-omap2/omap_twl.c return DIV_ROUND_UP(uv - 600000, 12500); uv 93 arch/arm/mach-omap2/omap_twl.c static u8 twl6030_uv_to_vsel(unsigned long uv) uv 109 arch/arm/mach-omap2/omap_twl.c if (!uv) uv 118 arch/arm/mach-omap2/omap_twl.c if (uv > twl6030_vsel_to_uv(0x39)) { uv 119 arch/arm/mach-omap2/omap_twl.c if (uv == 1350000) uv 122 arch/arm/mach-omap2/omap_twl.c __func__, uv, twl6030_vsel_to_uv(0x39)); uv 127 arch/arm/mach-omap2/omap_twl.c return DIV_ROUND_UP(uv - 709000, 12660) + 1; uv 129 arch/arm/mach-omap2/omap_twl.c return DIV_ROUND_UP(uv - 607700, 12660) + 1; uv 507 drivers/clk/tegra/clk-dfll.c unsigned long uv, min_uv; uv 515 drivers/clk/tegra/clk-dfll.c uv = dev_pm_opp_get_voltage(opp); uv 518 drivers/clk/tegra/clk-dfll.c if (uv && uv > min_uv) uv 29 drivers/clk/tegra/cvb.c int uv; uv 33 drivers/clk/tegra/cvb.c uv = max(mv * 1000, offset) - offset; uv 34 drivers/clk/tegra/cvb.c uv = DIV_ROUND_UP(uv, step) * align->step_uv + align->offset_uv; uv 35 drivers/clk/tegra/cvb.c return uv / 1000; uv 46 drivers/clk/tegra/cvb.c int uv; uv 48 drivers/clk/tegra/cvb.c uv = max(mv * 1000, align->offset_uv) - align->offset_uv; uv 49 drivers/clk/tegra/cvb.c uv = (uv + (up ? align->step_uv - 1 : 0)) / align->step_uv; uv 50 drivers/clk/tegra/cvb.c return (uv * align->step_uv + align->offset_uv) / 1000; uv 13 drivers/gpu/drm/nouveau/include/nvkm/subdev/volt.h u32 uv; uv 123 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c u32 uv; uv 189 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c gm20b_dvfs_calc_det_coeff(struct gm20b_clk *clk, s32 uv, uv 196 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c s32 mv = DIV_ROUND_CLOSEST(uv, 1000); uv 203 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c dvfs->dfs_ext_cal = DIV_ROUND_CLOSEST(uv - clk->uvdet_offs, uv 212 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c __func__, uv, dvfs->dfs_coeff, dvfs->dfs_ext_cal, uv 234 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c det_delta = DIV_ROUND_CLOSEST(((s32)clk->uv) - clk->uvdet_offs, uv 476 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c clk->new_uv = volt->vid[cstate->voltage].uv; uv 579 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c if (clk->uv == clk->new_uv) uv 605 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c if (clk->uv < clk->new_uv) uv 630 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c clk->uv = clk->new_uv; uv 791 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c clk->uvdet_offs = ((s32)clk->uv) - data * ADC_SLOPE_UV; uv 798 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c gm20b_dvfs_calc_det_coeff(clk, clk->uv, &clk->dvfs); uv 856 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c _clk->uv = nvkm_volt_get(volt); uv 990 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c vmin = volt->vid[0].uv; uv 992 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c if (volt->vid[i].uv <= vmin) { uv 993 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c vmin = volt->vid[i].uv; uv 43 drivers/gpu/drm/nouveau/nvkm/subdev/volt/base.c return volt->vid[i].uv; uv 51 drivers/gpu/drm/nouveau/nvkm/subdev/volt/base.c nvkm_volt_set(struct nvkm_volt *volt, u32 uv) uv 57 drivers/gpu/drm/nouveau/nvkm/subdev/volt/base.c return volt->func->volt_set(volt, uv); uv 60 drivers/gpu/drm/nouveau/nvkm/subdev/volt/base.c int err = volt->vid[i].uv - uv; uv 71 drivers/gpu/drm/nouveau/nvkm/subdev/volt/base.c nvkm_error(subdev, "couldn't set %iuv\n", uv); uv 76 drivers/gpu/drm/nouveau/nvkm/subdev/volt/base.c nvkm_debug(subdev, "set req %duv to %duv: %d\n", uv, uv 77 drivers/gpu/drm/nouveau/nvkm/subdev/volt/base.c volt->vid[best].uv, ret); uv 203 drivers/gpu/drm/nouveau/nvkm/subdev/volt/base.c volt->vid[volt->vid_nr].uv = info.base; uv 218 drivers/gpu/drm/nouveau/nvkm/subdev/volt/base.c volt->vid[volt->vid_nr].uv = ivid.voltage; uv 315 drivers/gpu/drm/nouveau/nvkm/subdev/volt/base.c volt->vid[i].vid, volt->vid[i].uv); uv 52 drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk104.c gk104_volt_set(struct nvkm_volt *base, u32 uv) uv 60 drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk104.c duty = DIV_ROUND_UP((uv - bios->base) * div, bios->pwm_range); uv 96 drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk20a.c int i, uv; uv 98 drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk20a.c uv = regulator_get_voltage(volt->vdd); uv 101 drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk20a.c if (volt->base.vid[i].uv >= uv) uv 113 drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk20a.c nvkm_debug(subdev, "set voltage as %duv\n", volt->base.vid[vid].uv); uv 114 drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk20a.c return regulator_set_voltage(volt->vdd, volt->base.vid[vid].uv, 1200000); uv 123 drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk20a.c int target_uv = volt->base.vid[id].uv; uv 152 drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk20a.c int i, uv; uv 156 drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk20a.c uv = regulator_get_voltage(tdev->vdd); uv 157 drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk20a.c nvkm_debug(&volt->base.subdev, "the default voltage is %duV\n", uv); uv 164 drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk20a.c volt->base.vid[i].uv = max( uv 168 drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk20a.c volt->base.vid[i].vid, volt->base.vid[i].uv); uv 15 drivers/gpu/drm/nouveau/nvkm/subdev/volt/priv.h int (*volt_set)(struct nvkm_volt *, u32 uv); uv 28 drivers/gpu/drm/nouveau/nvkm/subdev/volt/priv.h int nvkm_voltpwm_set(struct nvkm_volt *volt, u32 uv); uv 365 drivers/hwmon/lm93.c const long uv = mv * 1000; uv 374 drivers/hwmon/lm93.c u8 result = ((uv - intercept + (slope/2)) / slope); uv 329 drivers/hwmon/ntc_thermistor.c int raw, uv, ret; uv 337 drivers/hwmon/ntc_thermistor.c ret = iio_convert_raw_to_processed(channel, raw, &uv, 1000); uv 340 drivers/hwmon/ntc_thermistor.c uv = (pdata->pullup_uv * (s64)raw) >> 12; uv 343 drivers/hwmon/ntc_thermistor.c return uv; uv 445 drivers/hwmon/ntc_thermistor.c static int get_ohm_of_thermistor(struct ntc_data *data, unsigned int uv) uv 453 drivers/hwmon/ntc_thermistor.c if (uv == 0) uv 456 drivers/hwmon/ntc_thermistor.c if (uv >= puv) uv 461 drivers/hwmon/ntc_thermistor.c n = div_u64(pdo * (puv - uv), uv); uv 463 drivers/hwmon/ntc_thermistor.c n = div_u64(puo * uv, puv - uv); uv 465 drivers/hwmon/ntc_thermistor.c n = div64_u64_safe(pdo * puo * (puv - uv), uv 466 drivers/hwmon/ntc_thermistor.c puo * uv - pdo * (puv - uv)); uv 468 drivers/hwmon/ntc_thermistor.c n = div64_u64_safe(pdo * puo * uv, pdo * (puv - uv) - puo * uv); uv 144 drivers/media/pci/ivtv/ivtv-yuv.c int i, y, uv; uv 146 drivers/media/pci/ivtv/ivtv-yuv.c for (i = 0, y = 16, uv = 4; i < 16; i++, y += 24, uv += 12) { uv 148 drivers/media/pci/ivtv/ivtv-yuv.c (read_dec(IVTV_YUV_VERTICAL_FILTER_OFFSET + uv) != i << 16)) { uv 1865 drivers/media/usb/gspca/sonixj.c const s16 *uv; uv 1878 drivers/media/usb/gspca/sonixj.c uv = uv_mi0360b; uv 1880 drivers/media/usb/gspca/sonixj.c uv = uv_com; uv 1882 drivers/media/usb/gspca/sonixj.c v = uv[i] * colors / COLORS_DEF; uv 94 drivers/misc/sgi-xp/xpc.h } uv; uv 360 drivers/misc/sgi-xp/xpc.h struct xpc_channel_uv uv; uv 517 drivers/misc/sgi-xp/xpc.h struct xpc_partition_uv uv; uv 79 drivers/misc/sgi-xp/xpc_uv.c part_uv = &xpc_partitions[partid].sn.uv; uv 96 drivers/misc/sgi-xp/xpc_uv.c part_uv = &xpc_partitions[partid].sn.uv; uv 385 drivers/misc/sgi-xp/xpc_uv.c if (part->sn.uv.act_state_req == 0) uv 391 drivers/misc/sgi-xp/xpc_uv.c act_state_req = part->sn.uv.act_state_req; uv 392 drivers/misc/sgi-xp/xpc_uv.c part->sn.uv.act_state_req = 0; uv 408 drivers/misc/sgi-xp/xpc_uv.c XPC_DEACTIVATE_PARTITION(part, part->sn.uv.reason); uv 429 drivers/misc/sgi-xp/xpc_uv.c struct xpc_partition_uv *part_uv = &part->sn.uv; uv 680 drivers/misc/sgi-xp/xpc_uv.c struct xpc_partition_uv *part_uv = &part->sn.uv; uv 765 drivers/misc/sgi-xp/xpc_uv.c struct xpc_partition_uv *part_uv = &part->sn.uv; uv 819 drivers/misc/sgi-xp/xpc_uv.c &xpc_partitions[sn_partition_id].sn.uv.cached_heartbeat; uv 820 drivers/misc/sgi-xp/xpc_uv.c rp->sn.uv.heartbeat_gpa = uv_gpa(xpc_heartbeat_uv); uv 821 drivers/misc/sgi-xp/xpc_uv.c rp->sn.uv.activate_gru_mq_desc_gpa = uv 877 drivers/misc/sgi-xp/xpc_uv.c struct xpc_partition_uv *part_uv = &part->sn.uv; uv 906 drivers/misc/sgi-xp/xpc_uv.c part->sn.uv.heartbeat_gpa = remote_rp->sn.uv.heartbeat_gpa; uv 907 drivers/misc/sgi-xp/xpc_uv.c part->sn.uv.activate_gru_mq_desc_gpa = uv 908 drivers/misc/sgi-xp/xpc_uv.c remote_rp->sn.uv.activate_gru_mq_desc_gpa; uv 914 drivers/misc/sgi-xp/xpc_uv.c if (part->sn.uv.remote_act_state == XPC_P_AS_INACTIVE) { uv 916 drivers/misc/sgi-xp/xpc_uv.c msg.heartbeat_gpa = xpc_rsvd_page->sn.uv.heartbeat_gpa; uv 918 drivers/misc/sgi-xp/xpc_uv.c xpc_rsvd_page->sn.uv.activate_gru_mq_desc_gpa; uv 942 drivers/misc/sgi-xp/xpc_uv.c if (part->sn.uv.remote_act_state != XPC_P_AS_DEACTIVATING && uv 943 drivers/misc/sgi-xp/xpc_uv.c part->sn.uv.remote_act_state != XPC_P_AS_INACTIVE) { uv 1022 drivers/misc/sgi-xp/xpc_uv.c ch_uv = &part->channels[ch_number].sn.uv; uv 1054 drivers/misc/sgi-xp/xpc_uv.c while (!((part->sn.uv.remote_act_state == XPC_P_AS_ACTIVATING) || uv 1055 drivers/misc/sgi-xp/xpc_uv.c (part->sn.uv.remote_act_state == XPC_P_AS_ACTIVE))) { uv 1088 drivers/misc/sgi-xp/xpc_uv.c struct xpc_channel_uv *ch_uv = &ch->sn.uv; uv 1122 drivers/misc/sgi-xp/xpc_uv.c struct xpc_channel_uv *ch_uv = &ch->sn.uv; uv 1159 drivers/misc/sgi-xp/xpc_uv.c struct xpc_channel_uv *ch_uv = &ch->sn.uv; uv 1188 drivers/misc/sgi-xp/xpc_uv.c struct xpc_channel_uv *ch_uv = &ch->sn.uv; uv 1275 drivers/misc/sgi-xp/xpc_uv.c struct xpc_channel_uv *ch_uv = &ch->sn.uv; uv 1303 drivers/misc/sgi-xp/xpc_uv.c struct xpc_partition_uv *part_uv = &xpc_partitions[partid].sn.uv; uv 1314 drivers/misc/sgi-xp/xpc_uv.c return (xpc_partitions[partid].sn.uv.flags & XPC_P_ENGAGED_UV) != 0; uv 1324 drivers/misc/sgi-xp/xpc_uv.c part_uv = &xpc_partitions[partid].sn.uv; uv 1340 drivers/misc/sgi-xp/xpc_uv.c entry = xpc_get_fifo_entry_uv(&ch->sn.uv.msg_slot_free_list); uv 1361 drivers/misc/sgi-xp/xpc_uv.c xpc_put_fifo_entry_uv(&ch->sn.uv.msg_slot_free_list, &msg_slot->next); uv 1398 drivers/misc/sgi-xp/xpc_uv.c msg_slot = &ch->sn.uv.send_msg_slots[entry]; uv 1413 drivers/misc/sgi-xp/xpc_uv.c struct xpc_partition_uv *part_uv = &part->sn.uv; uv 1453 drivers/misc/sgi-xp/xpc_uv.c ch_uv = &ch->sn.uv; uv 1510 drivers/misc/sgi-xp/xpc_uv.c return xpc_n_of_fifo_entries_uv(&ch->sn.uv.recv_msg_list); uv 1585 drivers/misc/sgi-xp/xpc_uv.c ret = xpc_send_gru_msg(ch->sn.uv.cached_notify_gru_mq_desc, msg, uv 1637 drivers/misc/sgi-xp/xpc_uv.c msg_slot = &ch->sn.uv.send_msg_slots[entry]; uv 1654 drivers/misc/sgi-xp/xpc_uv.c entry = xpc_get_fifo_entry_uv(&ch->sn.uv.recv_msg_list); uv 1677 drivers/misc/sgi-xp/xpc_uv.c ret = xpc_send_gru_msg(ch->sn.uv.cached_notify_gru_mq_desc, msg, uv 365 drivers/regulator/bd718x7-regulator.c unsigned int uv; uv 367 drivers/regulator/bd718x7-regulator.c ret = of_property_read_u32(np, dvs->prop, &uv); uv 378 drivers/regulator/bd718x7-regulator.c if (ret == uv) { uv 245 drivers/regulator/da9062-regulator.c static int da9062_set_suspend_voltage(struct regulator_dev *rdev, int uv) uv 251 drivers/regulator/da9062-regulator.c sel = regulator_map_voltage_linear(rdev, uv, uv); uv 31 drivers/regulator/fixed-helper.c struct regulator_consumer_supply *supplies, int num_supplies, int uv) uv 45 drivers/regulator/fixed-helper.c data->cfg.microvolts = uv; uv 399 drivers/regulator/rk808-regulator.c static int rk808_set_suspend_voltage(struct regulator_dev *rdev, int uv) uv 402 drivers/regulator/rk808-regulator.c int sel = regulator_map_voltage_linear(rdev, uv, uv); uv 414 drivers/regulator/rk808-regulator.c static int rk817_set_suspend_voltage(struct regulator_dev *rdev, int uv) uv 417 drivers/regulator/rk808-regulator.c int sel = regulator_map_voltage_linear(rdev, uv, uv); uv 429 drivers/regulator/rk808-regulator.c static int rk808_set_suspend_voltage_range(struct regulator_dev *rdev, int uv) uv 432 drivers/regulator/rk808-regulator.c int sel = regulator_map_voltage_linear_range(rdev, uv, uv); uv 1393 drivers/staging/media/ipu3/ipu3-abi.h struct imgu_abi_frame_sp_plane uv; uv 968 drivers/staging/media/ipu3/ipu3-css.c sp_stage->frames.out[0].planes.nv.uv.offset = uv 47 include/linux/regulator/fixed.h struct regulator_consumer_supply *supplies, int num_supplies, int uv); uv 50 include/linux/regulator/fixed.h struct regulator_consumer_supply *supplies, int num_supplies, int uv) uv 31 net/unix/diag.c struct unix_diag_vfs uv = { uv 36 net/unix/diag.c return nla_put(nlskb, UNIX_DIAG_VFS, sizeof(uv), &uv);