user_tinfo       7680 drivers/scsi/aic7xxx/aic79xx_core.c 		struct	 ahd_transinfo *user_tinfo;
user_tinfo       7686 drivers/scsi/aic7xxx/aic79xx_core.c 		user_tinfo = &tinfo->user;
user_tinfo       7709 drivers/scsi/aic7xxx/aic79xx_core.c 		user_tinfo->ppr_options = 0;
user_tinfo       7710 drivers/scsi/aic7xxx/aic79xx_core.c 		user_tinfo->period = (sc->device_flags[targ] & CFXFER);
user_tinfo       7711 drivers/scsi/aic7xxx/aic79xx_core.c 		if (user_tinfo->period < CFXFER_ASYNC) {
user_tinfo       7712 drivers/scsi/aic7xxx/aic79xx_core.c 			if (user_tinfo->period <= AHD_PERIOD_10MHz)
user_tinfo       7713 drivers/scsi/aic7xxx/aic79xx_core.c 				user_tinfo->ppr_options |= MSG_EXT_PPR_DT_REQ;
user_tinfo       7714 drivers/scsi/aic7xxx/aic79xx_core.c 			user_tinfo->offset = MAX_OFFSET;
user_tinfo       7716 drivers/scsi/aic7xxx/aic79xx_core.c 			user_tinfo->offset = 0;
user_tinfo       7717 drivers/scsi/aic7xxx/aic79xx_core.c 			user_tinfo->period = AHD_ASYNC_XFER_PERIOD;
user_tinfo       7720 drivers/scsi/aic7xxx/aic79xx_core.c 		if (user_tinfo->period <= AHD_SYNCRATE_160)
user_tinfo       7721 drivers/scsi/aic7xxx/aic79xx_core.c 			user_tinfo->period = AHD_SYNCRATE_DT;
user_tinfo       7725 drivers/scsi/aic7xxx/aic79xx_core.c 			user_tinfo->ppr_options |= MSG_EXT_PPR_RD_STRM
user_tinfo       7730 drivers/scsi/aic7xxx/aic79xx_core.c 				user_tinfo->ppr_options |= MSG_EXT_PPR_RTI;
user_tinfo       7734 drivers/scsi/aic7xxx/aic79xx_core.c 			user_tinfo->ppr_options |= MSG_EXT_PPR_QAS_REQ;
user_tinfo       7737 drivers/scsi/aic7xxx/aic79xx_core.c 			user_tinfo->width = MSG_EXT_WDTR_BUS_16_BIT;
user_tinfo       7739 drivers/scsi/aic7xxx/aic79xx_core.c 			user_tinfo->width = MSG_EXT_WDTR_BUS_8_BIT;
user_tinfo       7742 drivers/scsi/aic7xxx/aic79xx_core.c 			printk("(%d): %x:%x:%x:%x\n", targ, user_tinfo->width,
user_tinfo       7743 drivers/scsi/aic7xxx/aic79xx_core.c 			       user_tinfo->period, user_tinfo->offset,
user_tinfo       7744 drivers/scsi/aic7xxx/aic79xx_core.c 			       user_tinfo->ppr_options);