usCKSVOffsetandDisable  143 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_pptable.h 	USHORT usCKSVOffsetandDisable;                              /* Bits 0~30: Voltage offset for CKS, Bit 31: Disable/enable for the GFXCLK level. */
usCKSVOffsetandDisable  150 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_pptable.h 	USHORT usCKSVOffsetandDisable;
usCKSVOffsetandDisable  673 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c 				(((le16_to_cpu(clk_dep_table->entries[i].usCKSVOffsetandDisable) & 0x8000)
usCKSVOffsetandDisable  676 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c 				le16_to_cpu(clk_dep_table->entries[i].usCKSVOffsetandDisable) & 0x7F;
usCKSVOffsetandDisable  688 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c 					(((le16_to_cpu(patom_record_v2->usCKSVOffsetandDisable) & 0x8000)
usCKSVOffsetandDisable  691 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c 					le16_to_cpu(patom_record_v2->usCKSVOffsetandDisable) & 0x7F;