ULVState 5222 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_populate_ulv_state(adev, &table->ULVState); ULVState 5236 drivers/gpu/drm/amd/amdgpu/si_dpm.c table->ULVState = table->initialState; ULVState 5762 drivers/gpu/drm/amd/amdgpu/si_dpm.c offsetof(SISLANDS_SMC_STATETABLE, ULVState); ULVState 5763 drivers/gpu/drm/amd/amdgpu/si_dpm.c SISLANDS_SMC_SWSTATE *smc_state = &si_pi->smc_statetable.ULVState; ULVState 483 drivers/gpu/drm/amd/amdgpu/si_dpm.h RV770_SMC_SWSTATE ULVState; ULVState 811 drivers/gpu/drm/amd/amdgpu/si_dpm.h NISLANDS_SMC_SWSTATE ULVState; ULVState 221 drivers/gpu/drm/amd/amdgpu/sislands_smc.h SISLANDS_SMC_SWSTATE ULVState; ULVState 1408 drivers/gpu/drm/radeon/btc_dpm.c &table->ULVState.levels[0], ULVState 1411 drivers/gpu/drm/radeon/btc_dpm.c table->ULVState.levels[0].arbValue = MC_CG_ARB_FREQ_F0; ULVState 1412 drivers/gpu/drm/radeon/btc_dpm.c table->ULVState.levels[0].ACIndex = 1; ULVState 1414 drivers/gpu/drm/radeon/btc_dpm.c table->ULVState.levels[1] = table->ULVState.levels[0]; ULVState 1415 drivers/gpu/drm/radeon/btc_dpm.c table->ULVState.levels[2] = table->ULVState.levels[0]; ULVState 1417 drivers/gpu/drm/radeon/btc_dpm.c table->ULVState.flags |= PPSMC_SWSTATE_FLAG_DC; ULVState 1987 drivers/gpu/drm/radeon/ni_dpm.c table->ULVState = table->initialState; ULVState 173 drivers/gpu/drm/radeon/nislands_smc.h NISLANDS_SMC_SWSTATE ULVState; ULVState 167 drivers/gpu/drm/radeon/rv770_smc.h RV770_SMC_SWSTATE ULVState; ULVState 4760 drivers/gpu/drm/radeon/si_dpm.c ret = si_populate_ulv_state(rdev, &table->ULVState); ULVState 4774 drivers/gpu/drm/radeon/si_dpm.c table->ULVState = table->initialState; ULVState 5302 drivers/gpu/drm/radeon/si_dpm.c offsetof(SISLANDS_SMC_STATETABLE, ULVState); ULVState 5303 drivers/gpu/drm/radeon/si_dpm.c SISLANDS_SMC_SWSTATE *smc_state = &si_pi->smc_statetable.ULVState; ULVState 221 drivers/gpu/drm/radeon/sislands_smc.h SISLANDS_SMC_SWSTATE ULVState;