umrwr             823 drivers/infiniband/hw/mlx5/mr.c 				  struct mlx5_umr_wr *umrwr)
umrwr             831 drivers/infiniband/hw/mlx5/mr.c 	umrwr->wr.wr_cqe = &umr_context.cqe;
umrwr             834 drivers/infiniband/hw/mlx5/mr.c 	err = ib_post_send(umrc->qp, &umrwr->wr, &bad);
umrwr            1354 drivers/infiniband/hw/mlx5/mr.c 	struct mlx5_umr_wr umrwr = {};
umrwr            1359 drivers/infiniband/hw/mlx5/mr.c 	umrwr.wr.send_flags = MLX5_IB_SEND_UMR_DISABLE_MR |
umrwr            1361 drivers/infiniband/hw/mlx5/mr.c 	umrwr.wr.opcode = MLX5_IB_WR_UMR;
umrwr            1362 drivers/infiniband/hw/mlx5/mr.c 	umrwr.pd = dev->umrc.pd;
umrwr            1363 drivers/infiniband/hw/mlx5/mr.c 	umrwr.mkey = mr->mmkey.key;
umrwr            1364 drivers/infiniband/hw/mlx5/mr.c 	umrwr.ignore_free_state = 1;
umrwr            1366 drivers/infiniband/hw/mlx5/mr.c 	return mlx5_ib_post_send_wait(dev, &umrwr);
umrwr            1373 drivers/infiniband/hw/mlx5/mr.c 	struct mlx5_umr_wr umrwr = {};
umrwr            1376 drivers/infiniband/hw/mlx5/mr.c 	umrwr.wr.send_flags = MLX5_IB_SEND_UMR_FAIL_IF_FREE;
umrwr            1378 drivers/infiniband/hw/mlx5/mr.c 	umrwr.wr.opcode = MLX5_IB_WR_UMR;
umrwr            1379 drivers/infiniband/hw/mlx5/mr.c 	umrwr.mkey = mr->mmkey.key;
umrwr            1382 drivers/infiniband/hw/mlx5/mr.c 		umrwr.pd = pd;
umrwr            1383 drivers/infiniband/hw/mlx5/mr.c 		umrwr.access_flags = access_flags;
umrwr            1384 drivers/infiniband/hw/mlx5/mr.c 		umrwr.wr.send_flags |= MLX5_IB_SEND_UMR_UPDATE_PD_ACCESS;
umrwr            1387 drivers/infiniband/hw/mlx5/mr.c 	err = mlx5_ib_post_send_wait(dev, &umrwr);
umrwr            4294 drivers/infiniband/hw/mlx5/qp.c 	const struct mlx5_umr_wr *umrwr = umr_wr(wr);
umrwr            4298 drivers/infiniband/hw/mlx5/qp.c 	if (!umrwr->ignore_free_state) {
umrwr            4307 drivers/infiniband/hw/mlx5/qp.c 	umr->xlt_octowords = cpu_to_be16(get_xlt_octo(umrwr->xlt_size));
umrwr            4309 drivers/infiniband/hw/mlx5/qp.c 		u64 offset = get_xlt_octo(umrwr->offset);
umrwr            4372 drivers/infiniband/hw/mlx5/qp.c 	const struct mlx5_umr_wr *umrwr = umr_wr(wr);
umrwr            4378 drivers/infiniband/hw/mlx5/qp.c 	seg->flags = convert_access(umrwr->access_flags);
umrwr            4379 drivers/infiniband/hw/mlx5/qp.c 	if (umrwr->pd)
umrwr            4380 drivers/infiniband/hw/mlx5/qp.c 		seg->flags_pd = cpu_to_be32(to_mpd(umrwr->pd)->pdn);
umrwr            4382 drivers/infiniband/hw/mlx5/qp.c 	    !umrwr->length)
umrwr            4385 drivers/infiniband/hw/mlx5/qp.c 	seg->start_addr = cpu_to_be64(umrwr->virt_addr);
umrwr            4386 drivers/infiniband/hw/mlx5/qp.c 	seg->len = cpu_to_be64(umrwr->length);
umrwr            4387 drivers/infiniband/hw/mlx5/qp.c 	seg->log2_page_size = umrwr->page_shift;
umrwr            4389 drivers/infiniband/hw/mlx5/qp.c 				       mlx5_mkey_variant(umrwr->mkey));