ulClock 1057 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c args.v4.ulClock = cpu_to_le32(clock); /* 10 khz */ ulClock 1062 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c dividers->real_clock = le32_to_cpu(args.v4.ulClock); ulClock 1067 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c args.v6_in.ulClock.ulComputeClockFlag = clock_type; ulClock 1068 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c args.v6_in.ulClock.ulClockFreq = cpu_to_le32(clock); /* 10 khz */ ulClock 1077 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c dividers->real_clock = le32_to_cpu(args.v6_out.ulClock.ulClock); ulClock 1078 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c dividers->post_divider = args.v6_out.ulClock.ucPostDiv; ulClock 1106 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c args.ulClock = cpu_to_le32(clock); /* 10 khz */ ulClock 1151 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c args.sReserved.ulClock = cpu_to_le32(mem_clock & SET_CLOCK_FREQ_MASK); ulClock 440 drivers/gpu/drm/amd/include/atombios.h ULONG ulClock; //When returen, it's the re-calculated clock based on given Fb_div Post_Div and ref_div ulClock 449 drivers/gpu/drm/amd/include/atombios.h ULONG ulClock; //When return, [23:0] return real clock ulClock 496 drivers/gpu/drm/amd/include/atombios.h ATOM_COMPUTE_CLOCK_FREQ ulClock; //Input Parameter ulClock 518 drivers/gpu/drm/amd/include/atombios.h ULONG ulClock:24; //Input= target clock, output = actual clock ulClock 520 drivers/gpu/drm/amd/include/atombios.h ULONG ulClock:24; //Input= target clock, output = actual clock ulClock 529 drivers/gpu/drm/amd/include/atombios.h ATOM_COMPUTE_CLOCK_FREQ ulClock; //Input Parameter ulClock 546 drivers/gpu/drm/amd/include/atombios.h ATOM_COMPUTE_CLOCK_FREQ ulClock; //Input Parameter ulClock 558 drivers/gpu/drm/amd/include/atombios.h COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V4 ulClock; //Output Parameter: ucPostDiv=DFS divider ulClock 571 drivers/gpu/drm/amd/include/atombios.h ATOM_COMPUTE_CLOCK_FREQ ulClock; //Input Parameter ulClock 582 drivers/gpu/drm/amd/include/atombios.h COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V4 ulClock; //Output Parameter: ucPostDiv=DFS divider ulClock 605 drivers/gpu/drm/amd/include/atombios.h ULONG ulClock; ulClock 631 drivers/gpu/drm/amd/include/atombios.h COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V4 ulClock; ulClock 637 drivers/gpu/drm/amd/include/atombios.h COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V4 ulClock; ulClock 646 drivers/gpu/drm/amd/include/atombios.h ATOM_COMPUTE_CLOCK_FREQ ulClock; ulClock 654 drivers/gpu/drm/amd/include/atombios.h ATOM_COMPUTE_CLOCK_FREQ ulClock; ulClock 663 drivers/gpu/drm/amd/include/atombios.h ATOM_COMPUTE_CLOCK_FREQ ulClock; ulClock 187 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c engine_clock_parameters.sReserved.ulClock = ulClock 257 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c mpll_parameters.ulClock = cpu_to_le32(clock_value); ulClock 305 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c mpll_parameters.ulClock.ulClock = cpu_to_le32(clock_value); ulClock 313 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c (uint32_t)mpll_parameters.ulClock.ucPostDiv; ulClock 326 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c mpll_parameters.ulClock.ulClock = cpu_to_le32(clock_value); ulClock 340 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c mpll_param->ulClock = ulClock 341 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c le32_to_cpu(mpll_parameters.ulClock.ulClock); ulClock 342 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c mpll_param->ulPostDiv = mpll_parameters.ulClock.ucPostDiv; ulClock 356 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c pll_parameters.ulClock = cpu_to_le32(clock_value); ulClock 364 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c dividers->real_clock = le32_to_cpu(pll_parameters.ulClock); ulClock 379 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c pll_patameters.ulClock.ulClock = cpu_to_le32(clock_value); ulClock 380 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c pll_patameters.ulClock.ucPostDiv = COMPUTE_GPUCLK_INPUT_FLAG_SCLK; ulClock 388 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c pll_patameters.ulClock.ucPostDiv; ulClock 390 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c le32_to_cpu(pll_patameters.ulClock.ulClock); ulClock 416 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c pll_patameters.ulClock.ulClock = cpu_to_le32(clock_value); ulClock 417 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c pll_patameters.ulClock.ucPostDiv = COMPUTE_GPUCLK_INPUT_FLAG_SCLK; ulClock 448 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c pll_patameters.ulClock.ulClock = cpu_to_le32(clock_value); ulClock 449 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c pll_patameters.ulClock.ucPostDiv = ulClock 458 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c pll_patameters.ulClock.ucPostDiv; ulClock 460 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c le32_to_cpu(pll_patameters.ulClock.ulClock); ulClock 1325 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c memory_clock_parameters.asDPMMCReg.ulClock.ulClockFreq = ulClock 1327 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c memory_clock_parameters.asDPMMCReg.ulClock.ulComputeClockFlag = ulClock 150 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h uint32_t ulClock; ulClock 266 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c dividers->ulClock = le32_to_cpu(pll_output->gpuclock_10khz); ulClock 61 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h uint32_t ulClock; /* the actual clock */ ulClock 970 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c mem_level->MclkFrequency = (uint32_t)mpll_param.ulClock; ulClock 410 drivers/gpu/drm/radeon/atombios.h ULONG ulClock; //When returen, it's the re-calculated clock based on given Fb_div Post_Div and ref_div ulClock 419 drivers/gpu/drm/radeon/atombios.h ULONG ulClock; //When return, [23:0] return real clock ulClock 462 drivers/gpu/drm/radeon/atombios.h ATOM_COMPUTE_CLOCK_FREQ ulClock; //Input Parameter ulClock 484 drivers/gpu/drm/radeon/atombios.h ULONG ulClock:24; //Input= target clock, output = actual clock ulClock 486 drivers/gpu/drm/radeon/atombios.h ULONG ulClock:24; //Input= target clock, output = actual clock ulClock 495 drivers/gpu/drm/radeon/atombios.h ATOM_COMPUTE_CLOCK_FREQ ulClock; //Input Parameter ulClock 512 drivers/gpu/drm/radeon/atombios.h ATOM_COMPUTE_CLOCK_FREQ ulClock; //Input Parameter ulClock 523 drivers/gpu/drm/radeon/atombios.h COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V4 ulClock; //Output Parameter: ucPostDiv=DFS divider ulClock 543 drivers/gpu/drm/radeon/atombios.h ULONG ulClock; ulClock 568 drivers/gpu/drm/radeon/atombios.h ATOM_COMPUTE_CLOCK_FREQ ulClock; ulClock 574 drivers/gpu/drm/radeon/atombios.h ATOM_COMPUTE_CLOCK_FREQ ulClock; ulClock 2857 drivers/gpu/drm/radeon/radeon_atombios.c args.v1.ulClock = cpu_to_le32(clock); /* 10 khz */ ulClock 2871 drivers/gpu/drm/radeon/radeon_atombios.c args.v2.ulClock = cpu_to_le32(clock); /* 10 khz */ ulClock 2879 drivers/gpu/drm/radeon/radeon_atombios.c dividers->enable_post_div = (le32_to_cpu(args.v2.ulClock) & (1 << 24)) ? ulClock 2881 drivers/gpu/drm/radeon/radeon_atombios.c dividers->vco_mode = (le32_to_cpu(args.v2.ulClock) & (1 << 25)) ? 1 : 0; ulClock 2925 drivers/gpu/drm/radeon/radeon_atombios.c args.v4.ulClock = cpu_to_le32(clock); /* 10 khz */ ulClock 2930 drivers/gpu/drm/radeon/radeon_atombios.c dividers->real_clock = le32_to_cpu(args.v4.ulClock); ulClock 2935 drivers/gpu/drm/radeon/radeon_atombios.c args.v6_in.ulClock.ulComputeClockFlag = clock_type; ulClock 2936 drivers/gpu/drm/radeon/radeon_atombios.c args.v6_in.ulClock.ulClockFreq = cpu_to_le32(clock); /* 10 khz */ ulClock 2945 drivers/gpu/drm/radeon/radeon_atombios.c dividers->real_clock = le32_to_cpu(args.v6_out.ulClock.ulClock); ulClock 2946 drivers/gpu/drm/radeon/radeon_atombios.c dividers->post_divider = args.v6_out.ulClock.ucPostDiv; ulClock 2974 drivers/gpu/drm/radeon/radeon_atombios.c args.ulClock = cpu_to_le32(clock); /* 10 khz */ ulClock 3072 drivers/gpu/drm/radeon/radeon_atombios.c args.sReserved.ulClock = cpu_to_le32(mem_clock & SET_CLOCK_FREQ_MASK); ulClock 2450 drivers/media/dvb-frontends/drxd_hard.c u32 ulClock = state->config.clock; ulClock 2554 drivers/media/dvb-frontends/drxd_hard.c state->osc_clock_freq = (u16) ulClock;