ui_ns             732 drivers/gpu/drm/vc4/vc4_dsi.c dsi_hs_timing(u32 ui_ns, u32 ns, u32 ui)
ui_ns             737 drivers/gpu/drm/vc4/vc4_dsi.c 	return roundup(ui + DIV_ROUND_UP(ns, ui_ns), 8);
ui_ns             826 drivers/gpu/drm/vc4/vc4_dsi.c 	u32 ui_ns;
ui_ns             949 drivers/gpu/drm/vc4/vc4_dsi.c 	ui_ns = DIV_ROUND_UP(500000000, hs_clock);
ui_ns             952 drivers/gpu/drm/vc4/vc4_dsi.c 		       VC4_SET_FIELD(dsi_hs_timing(ui_ns, 262, 0),
ui_ns             954 drivers/gpu/drm/vc4/vc4_dsi.c 		       VC4_SET_FIELD(dsi_hs_timing(ui_ns, 0, 8),
ui_ns             956 drivers/gpu/drm/vc4/vc4_dsi.c 		       VC4_SET_FIELD(dsi_hs_timing(ui_ns, 38, 0),
ui_ns             960 drivers/gpu/drm/vc4/vc4_dsi.c 		       VC4_SET_FIELD(dsi_hs_timing(ui_ns, 60, 0),
ui_ns             962 drivers/gpu/drm/vc4/vc4_dsi.c 		       VC4_SET_FIELD(dsi_hs_timing(ui_ns, 60, 52),
ui_ns             966 drivers/gpu/drm/vc4/vc4_dsi.c 		       VC4_SET_FIELD(dsi_hs_timing(ui_ns, 1000000, 0),
ui_ns             970 drivers/gpu/drm/vc4/vc4_dsi.c 		       VC4_SET_FIELD(dsi_hs_timing(ui_ns, 100, 0),
ui_ns             972 drivers/gpu/drm/vc4/vc4_dsi.c 		       VC4_SET_FIELD(dsi_hs_timing(ui_ns, 105, 6),
ui_ns             974 drivers/gpu/drm/vc4/vc4_dsi.c 		       VC4_SET_FIELD(dsi_hs_timing(ui_ns, 40, 4),
ui_ns             978 drivers/gpu/drm/vc4/vc4_dsi.c 		       VC4_SET_FIELD(dsi_hs_timing(ui_ns, lpx * ESC_TIME_NS, 0),
ui_ns             980 drivers/gpu/drm/vc4/vc4_dsi.c 		       VC4_SET_FIELD(max(dsi_hs_timing(ui_ns, 0, 8),
ui_ns             981 drivers/gpu/drm/vc4/vc4_dsi.c 					 dsi_hs_timing(ui_ns, 60, 4)),
ui_ns             994 drivers/gpu/drm/vc4/vc4_dsi.c 	DSI_PORT_WRITE(HS_DLT5, VC4_SET_FIELD(dsi_hs_timing(ui_ns,