TxNum 15 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c u8 TxNum, enum RATE_SECTION RateSection) TxNum 28 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][0]; TxNum 31 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][1]; TxNum 34 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][2]; TxNum 37 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][3]; TxNum 40 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][4]; TxNum 43 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][5]; TxNum 46 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][6]; TxNum 49 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][7]; TxNum 52 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][8]; TxNum 55 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][9]; TxNum 59 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c RateSection, RfPath, TxNum); TxNum 65 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][0]; TxNum 68 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][1]; TxNum 71 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][2]; TxNum 74 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][3]; TxNum 77 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][4]; TxNum 80 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][5]; TxNum 83 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][6]; TxNum 86 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][7]; TxNum 89 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][8]; TxNum 93 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c RateSection, RfPath, TxNum); TxNum 108 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c u8 TxNum, TxNum 122 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][0] = Value; TxNum 125 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][1] = Value; TxNum 128 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][2] = Value; TxNum 131 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][3] = Value; TxNum 134 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][4] = Value; TxNum 137 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][5] = Value; TxNum 140 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][6] = Value; TxNum 143 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][7] = Value; TxNum 146 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][8] = Value; TxNum 149 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][9] = Value; TxNum 153 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c RateSection, RfPath, TxNum); TxNum 159 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c pHalData->TxPwrByRateBase5G[RfPath][TxNum][0] = Value; TxNum 162 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c pHalData->TxPwrByRateBase5G[RfPath][TxNum][1] = Value; TxNum 165 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c pHalData->TxPwrByRateBase5G[RfPath][TxNum][2] = Value; TxNum 168 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c pHalData->TxPwrByRateBase5G[RfPath][TxNum][3] = Value; TxNum 171 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c pHalData->TxPwrByRateBase5G[RfPath][TxNum][4] = Value; TxNum 174 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c pHalData->TxPwrByRateBase5G[RfPath][TxNum][5] = Value; TxNum 177 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c pHalData->TxPwrByRateBase5G[RfPath][TxNum][6] = Value; TxNum 180 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c pHalData->TxPwrByRateBase5G[RfPath][TxNum][7] = Value; TxNum 183 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c pHalData->TxPwrByRateBase5G[RfPath][TxNum][8] = Value; TxNum 187 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c RateSection, RfPath, TxNum); TxNum 727 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c u32 TxNum, TxNum 749 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c if (TxNum > ODM_RF_PATH_D) { TxNum 750 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c DBG_871X("Invalid TxNum %d\n", TxNum); TxNum 757 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c TxNum = RF_2TX; TxNum 759 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c pHalData->TxPwrByRateOffset[Band][RfPath][TxNum][rateIndex[i]] = PwrByRateVal[i]; TxNum 778 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c u8 band, rfPath, TxNum, rate; TxNum 782 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c for (TxNum = 0; TxNum < TX_PWR_BY_RATE_NUM_RF; ++TxNum) TxNum 784 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c pHalData->TxPwrByRateOffset[band][rfPath][TxNum][rate] = 0; TxNum 791 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c u32 TxNum, TxNum 801 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c PHY_StoreTxPowerByRateNew(padapter, Band, RfPath, TxNum, RegAddr, BitMask, Data); TxNum 1473 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c struct adapter *padapter, u8 Band, u8 RFPath, u8 TxNum, u8 Rate TxNum 1492 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c if (TxNum >= RF_MAX_TX_NUM) { TxNum 1493 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c DBG_871X("Invalid TxNum %d in %s\n", TxNum, __func__); TxNum 1501 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c value = pHalData->TxPwrByRateOffset[Band][RFPath][TxNum][rateIndex]; TxNum 1511 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c u8 TxNum, TxNum 1527 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c if (TxNum >= RF_MAX_TX_NUM) { TxNum 1528 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c DBG_871X("Invalid TxNum %d in %s\n", TxNum, __func__); TxNum 1536 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c pHalData->TxPwrByRateOffset[Band][RFPath][TxNum][rateIndex] = Value; TxNum 176 drivers/staging/rtl8723bs/hal/odm_RegConfig8723B.c u32 TxNum, TxNum 185 drivers/staging/rtl8723bs/hal/odm_RegConfig8723B.c PHY_StoreTxPowerByRate(pDM_Odm->Adapter, Band, RfPath, TxNum, Addr, Bitmask, Data); TxNum 30 drivers/staging/rtl8723bs/hal/odm_RegConfig8723B.h u32 TxNum, TxNum 78 drivers/staging/rtl8723bs/include/hal_com_phycfg.h u8 TxNum, TxNum 118 drivers/staging/rtl8723bs/include/hal_com_phycfg.h u8 TxNum, TxNum 127 drivers/staging/rtl8723bs/include/hal_com_phycfg.h u8 TxNum, TxNum 159 drivers/staging/rtl8723bs/include/hal_com_phycfg.h u32 TxNum,