CM_RGAM_LUT_WRITE_EN_MASK  142 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h 	SRI(CM_RGAM_LUT_WRITE_EN_MASK, CM, id),\
CM_RGAM_LUT_WRITE_EN_MASK  361 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h 	TF_SF(CM0_CM_RGAM_LUT_WRITE_EN_MASK, CM_RGAM_LUT_WRITE_EN_MASK, mask_sh), \
CM_RGAM_LUT_WRITE_EN_MASK  567 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h 	type CM_RGAM_LUT_WRITE_EN_MASK; \
CM_RGAM_LUT_WRITE_EN_MASK 1137 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h 	uint32_t CM_RGAM_LUT_WRITE_EN_MASK; \
CM_RGAM_LUT_WRITE_EN_MASK  374 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c 	REG_UPDATE(CM_RGAM_LUT_WRITE_EN_MASK,
CM_RGAM_LUT_WRITE_EN_MASK  375 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c 			CM_RGAM_LUT_WRITE_EN_MASK, 7);
CM_RGAM_LUT_WRITE_EN_MASK  376 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c 	REG_UPDATE(CM_RGAM_LUT_WRITE_EN_MASK,